74HC74-Q100; 74HCT74-Q100
Nexperia
Dual D-type flip-flop with set and reset; positive edge-trigger
Table 8.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9.
Symbol Parameter Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
tsu
set-up time nD to nCP; see Figure 7
VCC = 2.0 V
VCC = 4.5 V
75
15
13
6
2
2
-
-
-
90
18
15
-
-
-
ns
ns
ns
VCC = 6.0 V
th
hold time
nD to nCP; see Figure 7
VCC = 2.0 V
3
3
3
6
2
2
-
-
-
3
3
3
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
fmax
maximum
frequency
nCP; see Figure 7
VCC = 2.0 V
4.8
24
-
23
69
76
82
24
-
-
-
-
-
4.0
20
-
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
28
-
24
-
[4]
[2]
CPD
power
dissipation
capacitance
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
74HCT74-Q100
tpd
propagation nCP to nQ, nQ; see
delay
Figure 7
VCC = 4.5 V
-
-
18
15
44
-
-
-
53
-
ns
ns
VCC = 5 V; CL = 15 pF
[2]
[2]
[3]
nSD to nQ, nQ; see
Figure 8
VCC = 4.5 V
-
-
23
18
50
-
-
-
60
-
ns
ns
VCC = 5 V; CL = 15 pF
nRD to nQ, nQ; see
Figure 8
VCC = 4.5 V
-
-
24
18
50
-
-
-
60
-
ns
ns
VCC = 5 V; CL = 15 pF
nQ, nQ; see Figure 7
VCC = 4.5 V
tt
transition
time
-
7
9
19
-
-
22
-
ns
ns
tW
pulse width nCP HIGH or LOW;
see Figure 7
VCC = 4.5 V
23
27
nSD, nRD LOW;
see Figure 8
VCC = 4.5 V
20
8
9
1
5
-
-
-
24
9
-
-
-
ns
ns
ns
trec
recovery
time
nSD, nRD; see Figure 8
VCC = 4.5 V
tsu
set-up time nD to nCP; see Figure 7
VCC = 4.5 V
15
18
74HC_HCT74_Q100
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Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 4 December 2015
8 of 19
NEXPERIA [ Nexperia ]
