74HC74-Q100; 74HCT74-Q100
Nexperia
Dual D-type flip-flop with set and reset; positive edge-trigger
5.2 Pin description
Table 2.
Symbol
1RD
1D
Pin description
Pin
1
Description
asynchronous reset-direct input (active LOW)
data input
2
1CP
1SD
1Q
3
clock input (LOW-to-HIGH, edge-triggered)
asynchronous set-direct input (active LOW)
output
4
5
1Q
6
complement output
GND
2Q
7
ground (0 V)
8
complement output
2Q
9
output
2SD
2CP
2D
10
11
12
13
14
asynchronous set-direct input (active LOW)
clock input (LOW-to-HIGH, edge-triggered)
data input
2RD
VCC
asynchronous reset-direct input (active LOW)
supply voltage
6. Functional description
Table 3.
Function table[1]
Input
nSD
L
Output
nRD
H
nCP
X
nD
X
nQ
H
nQ
L
H
L
X
X
L
H
L
L
X
X
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Table 4.
Input
nSD
H
Function table[1]
Output
nRD
H
nCP
nD
L
nQn+1
nQn+1
L
H
L
H
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level; = LOW-to-HIGH transition; Qn+1 = state after the next LOW-to-HIGH CP transition;
X = don’t care.
74HC_HCT74_Q100
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Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 4 December 2015
4 of 19
NEXPERIA [ Nexperia ]
