µPD75216A
(2) Legend for operation description
A
: A register; 4-bit accumulator
: B register
B
C
: C register
D
: D register
E
: E register
H
: H register
L
: L register
X
: X register
XA
BC
DE
HL
XA’
BC’
DE’
HL’
PC
SP
CY
PSW
MBE
RBE
: Register pair (XA); 8-bit accumulator
: Register pair (BC)
: Register pair (DE)
: Register pair (HL)
: Expanded register pair (XA’)
: Expanded register pair (BC’)
: Expanded register pair (DE’)
: Expanded register pair (HL’)
: Program counter
: Stack pointer
: Carry flag; Bit accumulator
: Program status word
: Memory bank enable flag
: Register bank enable flag
PORTn : Port n (n = 0 to 6)
IME
IPS
: Interrupt master enable flag
: Interrupt priority select register
: Interrupt enable flag
IE×××
RBS
MBS
PCC
•
: Register bank select register
: Memory bank select register
: Processor clock control register
: Address and bit delimiter
: Contents addressed by ××
: Hexadecimal data
(××)
××H
35
NEC [ NEC ]
