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UPD703208GKA-XXX-9EU 参数 Datasheet PDF下载

UPD703208GKA-XXX-9EU图片预览
型号: UPD703208GKA-XXX-9EU
PDF下载: 下载PDF文件 查看货源
内容描述: 32位单芯片微控制器产品 [32-Bit Single-Chip Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 757 页 / 4297 K
品牌: NEC [ NEC ]
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CHAPTER 2 PIN FUNCTIONS  
(14) PDH0 to PDH7 (port DH) ... I/O  
Port DH is an 8-bit I/O port that can be set to input or output in 1-bit units.  
In addition to functioning as a port, PDH0 to PDH7 can also be used as an address bus (A16 to A23) when the  
memory is expanded externally in the control mode (external expansion mode).  
The port mode and control mode can be selected as the operation mode for each bitNote, and are specified by  
the port DH mode control register (PMCDH).  
Note When specifying the port mode/control mode (alternate function) for each bit, pay careful attention to  
the operation of the alternate functions.  
(a) Port mode  
PDH0 to PDH7 can be set to input or output in 1-bit units by the port DH mode register (PMDH).  
(b) Control mode  
PDH0 to PDH7 can be used as A16 to A23 by the PMCDH register.  
(i) A16 to A23 (address bus) ... Output  
These are the higher 8-bit address output pins within a 24-bit address on the address bus during  
external access.  
(15) PDL0 to PDL15 (port DL) ... I/O  
Port DL is a 16-bit I/O port that can be set to input or output in 1-bit units.  
In addition to functioning as a port, PDL0 to PDL15 can also be used as an address/data bus in the multiplex  
mode and as a data bus in the separate mode when the memory is expanded externally in the control mode  
(external expansion mode).  
The port mode and control mode can be selected as the operation mode for each bitNote, and are specified by  
the port DL mode control register (PMCDL).  
Note When specifying the port mode/control mode (alternate function) for each bit, pay careful attention to  
the operation of the alternate functions.  
(a) Port mode  
PDL0 to PDL15 can be set to input or output in 1-bit units by the port DL mode register (PMDL).  
(b) Control mode  
PDL0 to PDL15 can be used as AD0 to AD15 by the PMCDL register.  
(i) AD0 to AD15 (address/data bus) ... I/O  
This is a multiplexed address/data bus during external access. In the address timing (T1 state), these  
pins function as 24-bit address A0 to A15 output pins, and in the data timing (T2, TW, and T3), they  
function as 16-bit data I/O bus pins.  
(16) RESET (reset) ... Input  
RESET input is an asynchronous input, and when a signal that has a certain low-level width is input,  
regardless of the operation clock, system reset is executed with priority over all other actions.  
In addition to normal initialize and start, RESET can also be used to release the standby mode (HALT, IDLE,  
and STOP).  
User’s Manual U15862EJ3V0UD  
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