µPD703100A-33, 703100A-40, 703101A-33, 703102A-33
12. A/D CONVERTER
{ Analog input: 8 channels
{ On-chip 10-bit A/D converter
{ On-chip A/D conversion result registers (ADCR0 to ADCR7)
10 bits × 8
{ A/D conversion trigger modes
A/D trigger mode
Timer trigger mode
External trigger mode
{ Successive approximation method
Figure 12-1. A/D Converter Block Diagram
Series resistor string
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
AVREF
Sample & hold circuit
R/2
R
R/2
AVSS
AVDD
Voltage comparator
9
9
0
SAR (10)
10
10
INTAD
0
ADCR0
ADCR1
ADCR2
ADCR3
ADCR4
ADCR5
ADCR6
ADCR7
INTCC110
INTCC111
INTCC112
INTCC113
Controller
Noise
Edge
ADTRG
elimination detection
7
0
7
0
ADM0 (8)
8
ADM1 (8)
10
8
Internal bus
44
Preliminary Data Sheet U14168EJ2V0DS00
NEC [ NEC ]
