µPD703100A-33, 703100A-40, 703101A-33, 703102A-33
11.3 Dedicated Baud Rate Generators 0 to 2 (BRG0 to BRG2)
{ Serial clock can be selected via either dedicated baud rate generator output or internal system clock (φ)
{ Identical baud rates during transmission and reception
Figure 11-3. Block Diagram of Dedicated Baud Rate Generators 0 to 2 (BRG0 to BRG2)
BRG0
BRGC0
CSI0
BRCE0
BPR00 to BPR02
Prescaler
Match
Internal system
UART0
clock (φ)
Clear
TMBRG0
1/2
CSI1
BRG1
BRG2
UART1
CSI2
CSI3
43
Preliminary Data Sheet U14168EJ2V0DS00