CHAPTER 7 8-BIT TIMER
7.4.4. PWM free-running mode operation (timer 50)
In the PWM free-running mode, TO50 becomes high level when TM50 overflows, and TO50 becomes low level
when CR50 and TM50 match. It is thus possible to output a pulse with any duty ratio.
To operate timer 50 in the PWM free-running mode, setting must be made in the following sequence.
<1> Disable operation of TM50 (TCE50 = 0).
<2> Disable timer output of TO50 (TOE50 = 0).
<3> Set a count value to CR50.
<4> Set the operation mode of timer 50 to the PWM free-running mode. (see Figure 7-4.)
<5> Set the count clock for timer 50.
<6> Set P31 to the output mode (PM31 = 0) and the P31 output latch to 0 and enable timer output of TO50
(TOE50 = 1).
<7> Enable the operation of TM50 (TCE50 = 1).
The operation in the PWM free-running mode is as follows.
<1> When the count value of TM50 matches the value set in CR50, an interrupt request signal (INTTM50) is
generated and a low level is output by the TO50. The TM50 continues counting without being cleared.
<2> TO50 outputs a high level when the TM50 overflows.
A pulse of any duty is output by repeating the above procedure. Figures 7-22 to 7-25 show the operation timing in
the PWM free-running mode.
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User’s Manual U15075EJ1V0UM00
NEC [ NEC ]
