CHAPTER 7 8-BIT TIMER
Figure 7-23. Operation Timing When Overwriting CR50 (When Rising Edge Is Selected) (2/2)
(2) When setting CR50 < TM50 after overflow
Count clock
N
00H 01H
00H
01H
FFH 00H 01H 02H
Overflow
FFH
TM50
Overflow
Overflow
01H
CR50
N
TCE50
Count start
INTTM50
TO50
Overflow occurs but
CR50 overwrite
no change takes place
because TO50 is
high level.
Figure 7-24. Operation Timing in PWM Free-Running Mode (When Both Edges Are Selected) (1/2)
(1) CR50 = Even number
Count clock
TM50
00H
Overflow
02H
2N
2N
FEH FFH
01H
FFH
00H
01H 02H
FEH
Overflow
Overflow
2N
CR50
TCE50
Count start
INTTM50
TO50
166
User’s Manual U15075EJ1V0UM00
NEC [ NEC ]
