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24C02 参数 Datasheet PDF下载

24C02图片预览
型号: 24C02
PDF下载: 下载PDF文件 查看货源
内容描述: [存储芯片]
分类和应用: 存储
文件页数/大小: 20 页 / 1827 K
品牌: NEC [ NEC ]
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K24C02C/K24C04/K24C08C/K24C16B
2K bits (256 X 8) / 4K bits (512 X 8) / 8K bits (1024 X 8) / 16K bits (2048 X 8)
Two-wire Serial EEPROM
Read Operations
RANDOM READ:
A random read requires a "dummy" byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller
must generate another start condition. The microcontroller now initiates a current address read by sending a device
address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the
data word. The microcontroller does not respond with a "0" but does generate a following stop condition (see Figure 8
on page 8).
SEQUENTIAL READ:
Sequential reads are initiated by either a current address read or a random address read. After
the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When
the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. The
sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a
following stop condition (see Figure 9 on page 8).
?
Figure 4: Device Address
2K
1
MSB
4K
1
0
1
0
A2
A1
P0
0
1
0
A2
A1
A0
R/W
LSB
R/W
8K
1
0
1
0
A2
P1
P0
R/W
16K
1
0
1
0
P2
P1
P0
R/W
?
Figure 5: Byte Write
S
W
T
R
A
I
R DEVICE T
T ADDRESS E
SDA LINE
M
S
B
L R AM
S / CS
BWK B
LA
SC
BK
A
C
K
WORD
ADDRESS
DATA
S
T
O
P
?
Figure 6: Page Write
S
W
T
R
A
I
R DEVICE T
T ADDRESS E
SDA LINE
M
S
B
L R AM
S / CS
BWK B
LA
SC
BK
A
C
K
A
C
K
A
C
K
WORD
ADDRESS
S
T
O
P
DATA ( n )
DATA ( n+1 )
DATA ( n+x )
Spring 2011
V1.3
.
007
.