K24C02C/K24C04/K24C08C/K24C16B
2K bits (256 X 8) / 4K bits (512 X 8) / 8K bits (1024 X 8) / 16K bits (2048 X 8 )
Two-wire Serial EEPROM
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Figure 3: Output Acknowledge
SCL
1
8
9
DATA IN
DATA OUT
START
ACKNOWLEDGE
Device Addressing
The 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device address word following a start condition to enable
the chip for a read or write operation (see to Figure 4 on page 7).
The device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown.
This is common to all the Serial EEPROM devices.
The next 3 bits are the A2, A1 and A0 device address bits for the 2K EEPROM. These 3 bits must compare to their
corresponding hardwired input pins.
The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory page address bit. The
two device address bits must compare to their corresponding hardwired input pins. The A0 pin is no connect.
The 8K EEPROM only uses the A2 device address bit with the next 2 bits being for memory page addressing. The A2 bit
must compare to its corresponding hard-wired input pin. The A1 and A0 pins are no connect.
The 16K does not use any device address bits but instead the 3 bits are used for memory page addressing. These page
addressing bits on the 4K, 8K and 16K devices should be considered the most significant bits of the data word address
which follows. The A0, A1 and A2 pins are no connect.
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a "0". If a compare is not made, the chip will return to a
standby state.
Spring 2011
V1.3
.
005
.
NEC [ NEC ]
