N64T1618C1B
NanoAmp Solutions, Inc.
Advance Information
Figure 1: Functional Block Diagram
Page
Address
Inputs
Address
Decode
Logic
A - A
4
21
4096K x 16
Memory
Array
Input/
Output
Word
I/O - I/O
Mux
and
Buffers
Address
Inputs
0
7
Address
Decode
Logic
A - A
0
3
I/O - I/O
8
15
CE
WE
Control
Logic
OE
UB
LB
ZZ
Table 2: Functional Description
I/O1
CE
H
L
WE
X
OE
UB/LB
ZZ
H
MODE
POWER
Standby
Active
Standby2
Write
X
X3
L
X
L1
L1
L
High Z
Data In
Data Out
High Z
L
H
L
H
H
Read
Active
Active
Standby4
L
H
H
H
L
H
L
X
X
X
X
X
L
L
High-Z
High-Z
Set register
Deep Sleep
Active
Deep Sleep
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - IO7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE), address inputs and data input/outputs are internally isolated from
any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
1
Table 3: Capacitance
Item
Symbol
CIN
Test Condition
Min
Max
6
Unit
pF
VIN = 0V, f = 1 MHz, TA = 25oC
VIN = 0V, f = 1 MHz, TA = 25oC
Input Capacitance
I/O Capacitance
CI/O
6
pF
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23403- Rev A 01/05
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
2
NANOAMP [ NANOAMP SOLUTIONS, INC. ]
