NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
N64T1618C1B
Advance Information
64Mb Ultra-Low Power Asynchronous CMOS PSRAM
4M × 16 Bits
Overview
The N64T1618C1B is an integrated memory
device containing a 64 Mbit Pseudo Static Random
Access Memory using a self-refresh DRAM array
organized as 4,194,304 words by 16 bits. It is
designed to be compatible in operation and
interface to standard 6T SRAMS. The device is
designed for low standby and operating current
and includes a power-down feature to
automatically enter standby mode. The device
includes a ZZ input for deep sleep as well as
several other power saving modes: Partial Array
Self Refresh mode where data is retained in a
portion of the array and Temperature
Compensated Refresh. Both these modes reduce
standby current drain. The N64T1618C1B can be
operated in a standard asynchronous mode and
data can also be read in a 4-word page mode for
fast access times. The die has separate power
rails, VccQ and VssQ for the I/O to be run from a
separate power supply from the device core.
Features
• Dual voltage rails for optimum power & per-
formance
Vcc - 1.7V - 1.95V
VccQ - 1.7V to 2.25V
VccQ - 2.3V to 2.7V
VccQ - 2.7V to 3.3V
• Fast Cycle Times
T
ACC
< 70 ns
T
PACC
< 25 ns
• Very low standby current
I
SB
< 120 µA
• Very low operating current
Icc < 25 mA
• PASR (Partial Array Self Refresh)
• TCR (Temperature Compensated Refresh)
Table 1: Product Family
Part Number
Package
Type
Operating
Temperature
Power
Supply
I/O Supply
1.7 - 1.95V
2.3 - 2.7V
2.7 - 3.3V
Speed
Standby
Current (I
SB
),
Max
120
µA
N64T1618C1BZ
BGA
-25
o
C
to
+85
o
C
1.70 - 1.95V
70ns
Ball Congiguration
1
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
Ball Description
3
A
0
A
3
A
5
A
17
A
21
A
14
A
12
A
9
2
OE
UB
I/O
10
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
ZZ
I/O
0
I/O
2
V
CC
V
SS
I/O
6
I/O
7
A
20
Pin Name
A
0
-A
21
WE
CE
ZZ
OE
LB
UB
I/O
0
-I/O
15
V
CC
V
SS
V
CCQ
V
SSQ
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Deep Sleep Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Power
Ground
Power I/O only
Ground I/O only
V
SSQ
I/O
11
V
CCQ
I/O
12
I/O
14
I/O
13
I/O
15
A
18
A
19
A
8
48 Pin BGA (top view)
6 x 8 mm
Stock No. 23403- Rev A 01/05
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
1
NANOAMP [ NANOAMP SOLUTIONS, INC. ]
