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The MU9C8358L outputs /CM Data/Command Select to
control whether the LANCAM interprets the DQ[15:0]
bus contents as command information or data. If both /CM
and /W are LOW at the falling edge of /E, the
MU9C8358L outputs an instruction for the LANCAM to
execute or a value for one of the LANCAM configuration
registers. If /CM is LOW while /W is HIGH, then the
LANCAM will output data from one of its configuration
registers to the MU9C8358L. If /CM is HIGH while /W is
LOW, the MU9C8358L will output data for the LANCAM
to place in one of its data registers or memory. If /CM is
HIGH while /W is HIGH, the LANCAM outputs data
from one of its data registers or memory to the
MU9C8358L.
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The Daisy Chain Enable signal performs two functions.
The /EC signal enables the LANCAMs /MF output to
show the results of a comparison. If /EC is LOW at the
falling edge of /E in a cycle, the /MF flag output is
enabled; otherwise, /MF is held HIGH. The /EC signal
also enables the /MF-/MI daisy chain that serves to select
the device with the highest-priority match in a string of
LANCAMs.
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The /MI LANCAM Match flag input is used to indicate to
the MU9C8358L the conditions of the LANCAM Match
flag. The /MF output from the LANCAM should be
connected to this pin. If more than one LANCAM is used,
/MI should be connected to the /MF pin of the last
LANCAM in the daisy chain.
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The /FI LANCAM Full flag input is used to indicate to the
MU9C8358L the condition of the LANCAM Full flag.
The /FF output from the LANCAM should be connected
to this pin. If more than one LANCAM is used, /FI should
be connected to the /FF of the last device in the daisy
chain.
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/RESET_LC is LOW whenever /RESET is LOW. It is
taken HIGH only by writing to bit 0 in the System
Dynamic Configuration (SDCFG) register. See SDCFG
register information. /RESET_LC is used only on the
master device; it is left unconnected on the slave device
when two MU9C8358Ls are connected together.
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The MU9C8358L configured as MASTER provides this
signal as an output. An MU9C8358L configured as a SLAVE
uses this signal as input. This signal is not used in a single
MU9C8358L application and may be left unconnected. This
pin has a 50-kΩ internal pull-up resistor. See Timing
Diagrams: Timing Data for Control Interfaces.
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The MU9C8358L configured as MASTER must monitor the
attached slave device to determine which device gains access
to the CAM in a given processing cycle. These signals are
not used in a single MU9C8358L application, and may be
left unconnected. These pins have 50-kΩ internal pull-up
resistors. See Timing Diagrams: Timing Data for Control
Interfaces.
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Please refer to IEEE Standard 1149.1 for information on
using the mandatory JTAG functions. The optional HIGH-Z
function is implemented and may be activated by writing
0011 to the JTAG Instruction register.
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The /TRST is the Test Reset pin. It is internally pulled up
with a 50-kΩ resistor. It must be tied to /RESET or tied LOW
when the JTAG port is not used.
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The TCK input is the Test Clock input. It can be tied at a
valid logic level 1 when not in use. This pin is internally
pulled up with a 50-kΩ resistor.
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The TMS input is the Test Mode Select input. This pin is
internally pulled up with a 50-kΩ resistor.
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The TDI input is the Test Data input. This pin is internally
pulled up with a 50-kΩ resistor.
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The TDO output is the Test Data output.
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This pin is used for internal MUSIC Semiconductor testing
only. This pin has a 50-kΩ pull-up resistor to VDD and may
be left as "NO CONNECT" in system applications.
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These pins are the power supply connections to the
MU9C8358L. VDD must meet the voltage supply
requirements in the Operating Conditions section relative to
the GND pins, which are at 0 Volts (system reference
potential), for correct operation of the device.
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MUSIC [ MUSIC SEMICONDUCTORS ]
