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The MU9C8358L building blocks are shown in Figure 4,
and their functions are described by the following.
When the DA sequence is executed, the result is stored in
a FIFO for later collection by either the CPU over the
Processor Bus from the Result register, or by external
hardware attached to the Result port.
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The incoming asynchronous receive data is registered for
subsequent processing. MU9C8358L internal processing
is synchronous with the system clock.
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At power-up or after a hardware reset, the host processor
should download the LANCAM configuration and register
contents to enable the LANCAM to operate as required.
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Rejection of a packet is indicated by the assertion of REJ.
The FRX_ER line, which otherwise reflects the state of
the RX_ER pin, is forced to HIGH at the same time. If the
DA is matched in the LANCAM, the TP_DV pin is
asserted and the destination port ID, high-order bit first, is
clocked out through the TP_SD pin transitioning after the
RX_CLK rising edge.
The LANCAM initialization and configuration that is
downloaded by the CPU should do the following: The
individual Page Address registers of each LANCAM in
the LANCAM chain should be set with appropriate values.
The Foreground Register set should be set to allow normal
DA and SA filtering. This involves setting the Control,
Segment Control, and Mask registers to suit. The
Background Register set should be set to allow the
background management tasks to be preformed. This
involves setting the Control, Segment Control, and Mask
registers to suit. The LANCAM should be configured to
store 48-bit MAC addresses in segments 3–1 and the
associated data in segment 0. The allocation of bits in the
16-bit associated data segment is specified in the
description of the SCDW0 Association Data register. A
full description of the configuration routine required for a
typical eight port switch is given in AN-N24: Using the
MU9C8358L Quad 10/100 Mb Ethernet Filter Interface in
Switch Applications.
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This block performs tasks that are a subset of the Ethernet
MACs. It detects errors, (CRS, COL, RX_ER, and Runt
Frame), determines the start of frame, parses addresses,
computes the CRC for 10Base-X packets, and formats the
4-bit nibbles into 48-bit SA and DA registers.
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The arbiter performs prioritization of internal functions
and resource allocation. The arbiter allows two
MU9C8358Ls to be cascaded and to share a single CAM
database. The arbitration scheme requires that one
MU9C8358L be the master and the other be the slave.
Setting the bits 2–0 in the CHIPROL register to 000
identifies the Master. The MU9C8358L will function
either as a Master or a Slave, and arbitration is transparent
to the user.
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Using the Add Entry routine, the nonvolatile station list
can be added to the LANCAM by the host processor. The
Associated Data bit 15 is set to 1, to indicate a permanent
entry. Permanent entries are removed only with the Delete
Entry routine.
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The sequencer is a state machine that generates the control
signals required for CAM read and write cycles, and
multiplexes appropriate data and operational codes to
LANCAM data lines.
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The Delete Entry and Read Entry routines are available for
database maintenance and housekeeping. Although
permanent addresses cannot be purged, they can be
deleted using the management Delete Entry routine.
The sequencer operations are:
•
•
•
•
•
•
•
Execute LANCAM cycles for CPU port
DA processing
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Time stamps are added automatically to the LANCAM
entries by the MU9C8358L. Two counters are provided to
store the current and purge time stamps. The Current Time
Stamp is the 8-bit value that automatically is added or
updated when a SA processing function is completed. The
Purge Time stamp is the 8-bit value that is compared with
the 8-bit time stamps stored with the LANCAM entries
during purges. The initial value of the counters are
STPURG = 01H and STCURR = 00H. The counters may
be incremented individually through the CPU commands.
SA processing
Purging of aged entries
Add Permanent Entries to LANCAM database
Delete Entries from LANCAM database
Read Entries from the LANCAM database.
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MUSIC [ MUSIC SEMICONDUCTORS ]
