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MU9C8358L 参数 Datasheet PDF下载

MU9C8358L图片预览
型号: MU9C8358L
PDF下载: 下载PDF文件 查看货源
内容描述: 四10 / 100Mb的以太网接口过滤器 [Quad 10/100Mb Ethernet Filter Interface]
分类和应用: 过滤器以太网局域网(LAN)标准
文件页数/大小: 32 页 / 534 K
品牌: MUSIC [ MUSIC SEMICONDUCTORS ]
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2. Write the associated data for this entry into SCDW0.  
The port ID should be set in bits 13–8 and bit 15 should  
be set HIGH if the entry is to be permanent.  
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The MU9C8358L contains seven built-in routines that can  
be invoked or triggered by writing any arbitrary value to  
the appropriate System Command register.  
3. Initiate the add sequence by writing any value to the  
SDO_ADD register.  
Five built-in routines that perform general system  
management functions.  
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1. Write the desired address of the CAM entry to be read  
into SCDW0.  
Two routines that alter the data-age gap between the  
two time stamp counters.  
Details of the built-in routines that are performed when  
invoked can be found in Applications: Built-In Routines.  
Details of the appropriate register for each routine can be  
found in Operational Characteristics: Software  
Model-System Registers. Each of the seven routines is  
explained below.  
2. Initiate the set address sequence by writing any value to  
the SDO_SETADD register.  
Note: This sequence should be initiated prior to the read entry  
sequence being initiated in order to specify the address that  
should be read.  
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1. Write the Page Address to the CAM device to be read  
into SCDW0. This should match the value that was  
configured during any CAM configuration routine.  
Initiate the STCURR increment sequence by writing any  
arbitrary value to SDO_INCTS.  
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2. Initiate the read entry sequence by writing any value to  
the SDO_READ register.  
Initiate the STPURG increment sequence by writing any  
arbitrary value to SDO_INCPR.  
3. The specified entry can be read from SCDW3, 2, and 1  
and the associated data can be read from SCDW0. Bits  
47–32 should be read from SCDW 3, bits 31–16 from  
SCDW2, and bits 15–0 from SCDW1.  
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Initiate the STCURR and STPURG increment sequence  
by writing any arbitrary value to SDO_INCTSPR.  
4. The CAM Status Register bits 31–16 associated with  
the entry can be read from the System CAM Status  
Word B (SCSWB) register.  
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1. Write the address to be deleted into System Command  
Data Word (SCDW) 2, 1, and 0. Bits 47–32 should be  
written into SCDW 2, bits 31–16 into SCDW1, and bits  
15–0 into SCDW0.  
5. The CAM Status Register bits 15–0 associated with the  
entry can be read from the System CAM Status Word A  
(SCSWA) register.  
Note: This sequence should be initiated in conjunction with the  
set address sequence in order to specify the address that should  
be read. If successive entries are to be read, SDO_SETADD is  
used only once as the CAM Address register will increment  
automatically.  
2. Initiate the delete sequence by writing any value to the  
SDO_DELETE register.  
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1. Write the address to be added into System Command  
Data Word (SCDW) 3, 2, and 1. Bits 47–32 should be  
written into SCDW 3, bits 31–16 into SCDW2, and bits  
15–0 into SCDW1.  
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