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MU9C8338A-TFI 参数 Datasheet PDF下载

MU9C8338A-TFI图片预览
型号: MU9C8338A-TFI
PDF下载: 下载PDF文件 查看货源
内容描述: 10 / 100Mb的以太网接口筛选 [10/ 100Mb Ethernet Filter Interface]
分类和应用: 网络接口电信集成电路电信电路以太网
文件页数/大小: 32 页 / 438 K
品牌: MUSIC [ MUSIC SEMICONDUCTORS ]
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MU9C8338A 10/100Mb Ethernet Filter Interface  
Functional Description  
Destination Address Processing  
2. External circuitry can monitor the status of the  
Result Port Data valid (RP_DV) output pin. This  
output indicates that there is a result available in the  
internal register which can be read through the Result  
port. The external circuitry can read the data by  
asserting the Result Port Select (RP_SEL) pin.  
Assertion of Result Port Next (RP_NXT) clears the  
value and advances the next entry if there is one  
available.  
Once configured, the MU9C8338A will extract the DA  
from the frames that are received through the MII port. An  
automatic address processing function is subsequently  
triggered. Once the DA processing function is triggered,  
the frame is monitored to detect whether it is a broadcast,  
multicast, or unicast frame and the appropriate actions are  
taken. DA processing consists of the following actions:  
Packets are characterized as Broadcast, Multicast, or  
Unicast types.  
Source Address Processing  
Once configured, the MU9C8338A also will perform SA  
processing functions after the address information has  
been extracted from a received frame. The SA of each  
arriving frame is stored by the MU9C8338A for further  
processing, along with the port ID and the current time  
stamp. Note that at start-up, permanent addresses and their  
Port ID are loaded into the LANCAM through the CPU  
port; as message traffic proceeds, new addresses are  
learned and added to the LANCAM database, and aged  
addresses are purged. SA processing consists of the  
following actions:  
Unicast packets initiate a search of the CAM for  
existing entries.  
Multicast and Broadcast packets will also initiate a  
search if the PCFG_EXT register is appropriately  
configured.  
If a DA match is found, the Port ID read from the  
CAM is compared to the Source Port ID. If the Source  
Port ID and Destination Port ID match, the frame is  
rejected. If the Port IDs are different, the Tag  
information is made available for MACs that support  
Tag switching, through the Tag port.  
The SA field is collected and temporarily stored. Note  
the SA cannot be a Broadcast or Multicast address by  
definition.  
If a DA match is not found and the packet  
characterized as Multicast or Broadcast, a default  
action is carried out if Multicast Processing is  
enabled. This allows Multicast and Broadcast packets  
to be processed appropriately and is configured in the  
PCFG_EXT register.  
When the complete packet has arrived, the CRC field  
is checked and the length of the packet is checked.  
Any errors result in no further SA processing.  
If the packet did not contain any errors, (or the CRC  
check facility is disabled), the SA field is compared  
with the address fields that are stored in the  
LANCAM.  
If the MU9C8338A rejects the frame, it asserts the  
Reject output pin (REJ) and forces the MII RX_ER  
output (FRX_ER) HIGH for the MII Port. This causes  
the MAC to discard the frame.  
If a match is found, the Port ID and time stamp for  
that entry are updated. If no match is found, the SA is  
added to the CAM, along with the current time stamp  
and the Port ID assigned to that particular Source port.  
Once the DA processing function is complete, the  
MU9C8338A stores the result. This result indicates  
the characterization of the processed frame.  
(Broadcast, Multicast, or Unicast) and the Source Port  
ID. Additionally, if a unicast frame was processed, the  
result of the search and the port ID of the DA is also  
stored. Finally, the detail of whether the Destination  
port and the Source port are identical is also stored.  
The result of DA processing may be read in two ways.  
1. An interrupt may be sent to the host processor  
indicating that there is a result available. The host  
processor would read the result from an internal  
Result Data register.  
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