MU9C8328A Ethernet Interface
FUNCTIONAL DESCRIPTION Continued
A(3–0)
0H
0H
1H
1H
2H
2H
3H
3H
4H
4H
5H
5H
6H
6H
7H
7H
8H
8H
9H
9H
AH
AH
/WE
L
Resource Selected
Action
Write
Control register
H
L
Control register
Read
Reserved
H
L
Status Register
Read
Write
Read
Learn Op-Code Register
Learn Op-Code Register
Reserved
H
L
H
L
Associated Data Register
LANCAM Command Cycle with /EC LOW
LANCAM Command Cycle with /EC LOW
LANCAM Command Cycle with /EC HIGH
LANCAM Command Cycle with /EC HIGH
LANCAM Data Cycle with /EC LOW
LANCAM Data Cycle with /EC LOW
LANCAM Data Cycle with /EC HIGH
LANCAM Data Cycle with /EC HIGH
Update Op-Code Register
Update Op-Code Register
Purge Op-Code Register
Purge Op-Code Register
Time stamp Register
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
H
L
H
L
H
L
H
L
H
L
H
L
H
Time stamp Register
Table 1: Address Decode
DA Match Found
DA1 DA2 DA3 SA1
SA No-Match/Learn
SA2 SA3 Length/Type
SERDAT
/E
Preamble
SFD
Data
/CM
/W
/EC
/MF
/REJECT
/INT
Figure 1: Typical Network Filtering
6
Rev. 0.8 Draft
MUSIC [ MUSIC SEMICONDUCTORS ]
