MU9C1965A/L LANCAM MP
GENERAL DESCRIPTION
The MU9C1965A and MU9C1965L LANCAM MPs are
1024 x 128-bit content-addressable memories (CAMs),
featuring a 32-bit wide interface. The wide comparand width
allows the LANCAM MP to handle multiple protocols in a
single search table device.
data words up to 128 bits wide allows large address spaces
to be searched rapidly and efficiently. A patented
architecture links each CAM entry to associated data and
makes this data available for use after a successful compare
operation.
Content-addressable memories, also known as associative
memories, operate in the converse way to random access
memories (RAM). In a RAM, the input to the device is an
address and the output is the data stored at that address.
In a CAM, the input is a data sample and the output is a
flag to indicate a match and the address of the matching
data. As a result, a CAM searches large databases for
matching data in a short, constant time period, no matter
how many entries are in the database. The ability to search
The MUSIC LANCAM MP is ideal for address filtering and
translation applications in LAN and ATM switches and
routers that need the wide Comparand for Virtual LANs, VC
translation, or IPV6 address recognition. The 128-bit CAM
width is enough to include the DA, SA, Port ID, and Virtual
LAN ID for LAN switches, or DA, SA, and VC for ATM
switches. The LANCAM MP is also well suited for
encryption, database accelerators, and image processing.
OPERATIONAL OVERVIEW
To use the LANCAM MP, the user loads the data into the
Comparand register, which is automatically compared to all
valid CAM locations. The device then indicates whether
or not one or more of the valid CAM locations contains
data that matches the target data. The status of each CAM
location is determined by two validity bits at each memory
location. The two bits are encoded to render four validity
conditions: Valid, Skip, Empty, and Random access, as
shown in Table 1. The memory can be partitioned into CAM
and associated RAM segments on 32-bit boundaries, but
by using one of the two available mask registers, the CAM/
RAM partitioning can be set at any arbitrary size between
zero and 128 bits.
cascading of additional LANCAM MPs in a daisy chain
fashion extends the CAM memory depth for large
databases. Cascading requires no external logic. Loading
data to the Control, Comparand, and mask registers
automatically triggers a compare. Compares may also be
initiated by a command to the device. Associated RAM
data is available immediately after a successful compare
operation. The Status register reports the results of
compares including all flags and addresses. Two mask
registers are available and can be used in two different
ways: to mask comparisons or to mask data writes. The
random access validity type allows additional masks to be
stored in the CAM array where they may be retrieved
rapidly.
The LANCAM MP’s internal data path is 128 bits wide for
rapid internal comparison and data movement. Vertical
A simple four-wire control interface and commands loaded
into the Instruction decoder control the device. A powerful
instruction set increases the control flexibility and minimizes
software overhead. Additionally, dedicated pins for match
and multiple match flags enhance performance when the
device is controlled by a state machine. These and other
features make the LANCAM MP a powerful associative
memory that drastically reduces search delays.
Skip Bit
Empty Bit
Entry Type
Valid
0
0
1
1
0
1
0
1
Empty
Skip
RAM
Table 1: Entry Types vs. Validity Bits
Rev. 1a
2
MUSIC [ MUSIC SEMICONDUCTORS ]
