®
®
ADS-325A
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25°C)
PARAMETERS
Supply Voltages (+AV
S
and +DV
S
)
Reference Voltage (V
RT
and V
RB
)
Input Voltage, Analog (V
IN
)
Input Voltage, Digital (V
IH
and V
IL
)
Output Voltage, Digital (V
OH
and V
OL
)
LIMITS
0 to +7
–0.5 to +AV
S
+0.5
–0.5 to +AV
S
+0.5
–0.5 to +AV
S
+0.5
–0.5 to +DV
S
+0.5
UNITS
Volts
Volts
Volts
Volts
Volts
PERFORMANCE (CONT.)
Spurious Free Dynamic Range
f
IN
= 100kHz
f
IN
= 500kHz
f
IN
= 1MHz
f
IN
= 3MHz
f
IN
= 7MHz
f
IN
= 10MHz
POWER REQUIREMENTS
MIN.
—
—
—
—
—
—
TYP.
60
59
60
65
50
49
MAX.
—
—
—
—
—
—
UNITS
dB
dB
dB
dB
dB
dB
FUNCTIONAL SPECIFICATIONS
(Typical at f
S
= 20MHz, +AV
S
= +5V, +DV
S
= +3.3V, V
RB
= +2.0V, V
RT
= +4.0V,
and T
A
= +25°C unless otherwise specified.)
ANALOG INPUTS
Input Voltage Range, V
IN
Input Current
V
IN
= +4V
V
IN
= +2V
Capacitance, C
IN
Bandwidth
(–1dB)
REFERENCE
Reference Input Voltage
V
RT
V
RB
Input Current
I
RT
I
RB
Offset Voltage
V
RT
V
RB
Resistance
(V
RT
– V
RB
)
DIGITAL INPUTS
Input Voltage
V
IH,
Logic "1"
V
IL,
Logic "0"
Input Current
I
IH
, Logic Loading "1"
I
IL
, Logic Loading "0"
A/D Clock Pulse Width
T
PW1
T
PW0
DIGITAL OUTPUTS
Output Logic Current
I
OH,
Logic "1"
I
OL,
Logic "0"
Leak Current at OE = "1"
3-State Enable Time,
T
PZE
3-State Disable Time,
T
PEZ
Data Delay,
T
DL
(C
L
= 20pF)
PERFORMANCE
Resolution
Max. Throughput Rate
Min. Throughput Rate
Integral Linearity Error
Differential Linearity Error
Differential Gain Error
Differential Phase Error
Aperture Delay,
Tsd
SNR & Distortion
f
IN
= 100kHz
f
IN
= 500kHz
f
IN
= 1MHz
f
IN
= 3MHz
f
IN
= 7MHz
f
IN
= 10MHz
10
20
—
—
—
—
—
2
—
—
—
—
—
—
—
—
—
±1.3
±0.5
1.0
0.3
4
53
52
53
54
47
45
—
—
0.5
±2
±1
—
—
6
—
—
—
—
—
—
Bits
MHz
MHz
LSB
LSB
%
Degrees
ns
dB
dB
dB
dB
dB
dB
–3.5
3.5
—
10
20
8
—
—
—
15
25
13
—
—
1
20
30
18
mA
mA
µA
ns
ns
ns
+2.3
—
—
—
25
25
—
—
—
—
—
—
—
+0.8
5
5
—
—
Volts
Volts
µA
µA
ns
ns
—
+1.8
5
–11
+40
–120
180
+4
+2
7
–7
+90
–70
280
+4.6
—
11
–5
+140
–20
380
Volts
Volts
mA
mA
mV
mV
Ω
MIN.
TYP.
+2 to +4
—
–50
—
—
40
–40
9
70
50
—
—
—
MAX.
UNITS
Volts
µA
µA
pF
MHz
Power Supply Voltage
+AV
S
+DV
S
|DGND – AGND |
Supply Current
Analog, +AI
S
Digital, +DI
S
Standby Current
(CE = "1")
Analog, +AI
S
Digital, +DI
S
Power Dissipation
PHYSICAL/ENVIRONMENTAL
Operating Temperature Range
Storage Temperature Range
Weight
Package
Footnotes:
+DV
S
= Max., V
IH
= +DV
S
+DV
S
= Max., V
IL
= 0V
OE = AGND, +DV
S
= Min.,
V
OH
= +DV
S
-0.5V
OE = AGND, +DV
S
= Min.,
V
OL
= 0.4V
+4.75
+3.0
—
20
—
—
—
—
+5.0
—
—
27
3
—
—
150
+5.25
+5.25
100
34
5
1
1
—
Volts
Volts
mV
mA
mA
mA
µA
mW
–20
–55
—
+75
—
+150
0.2 grams
48-pin plastic LQFP
°C
°C
OE = +AV
S
, +DV
S
= Max.,
V
OH
= +DV
S
, and V
OL
= 0V
Hi-Z to Active, asynchronous with clock.
Active to Hi-Z, asynchronous with clock.
Fin = 1kHz
NTSC 401RE mod. ramp, fc = 14.3MHz
TECHNICAL NOTES
1.
Caution to ESD:
Since the ADS-325A is a CMOS device,
precautions against static electricity should be taken.
2.
+AV
S
and +DV
S
:
While the unit has separate pins for both
the analog supply (+AV
S
) and the digital supply (+DV
S
), a
time skew between supplying (or removing) both +AV
S
and
+DV
S
may cause a latch-up problem. DATEL recommends
using a common power supply for both +AV
S
and +DV
S
to
avoid latch-up conditions. It is possible to use +3.3V for
+DV
S
along with +5V for +AV
S
. Compared to the singe +5V
supply application, there will be no significant difference in
performance. However, special care should be taken to
minimize the time skew between +AV
S
and +DV
S
when
turning on/off.
3.
PC board layout:
To obtain fully specified performance
careful attention to PC board layout is required. Place large
ground planes on the board and connect both analog and
digital grounds at one point right beneath the converter. In
the case where the grounds are tied at a location distant
from the converter, the voltage difference between the
grounds must be within 100mV. Tie all ground pins directly
to the appropriate ground plane beneath the converter.
Bypass +AV
S
and +DV
S
pins to ground using 10µF
tantalum capacitors in parallel with 0.1µF ceramic
capacitors at locations as close to the unit as possible.
4.
Reference Input:
Two external voltage references are
required for the two reference inputs VRT (pin 29, 30) and
VRB (pin 34, 35). Typically, these are +4V for VRT and +2V
2
MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
