MP1527
2A, 1.3MHz
Step-Up Converter
Monolithic Power Systems
Functional Description
The MP1527 uses a 1.3MHz fixed-frequency,
current-mode regulation architecture to
regulate the output voltage. The MP1527
measures the output voltage through an
external resistive voltage divider and compares
that to the internal 1.22V reference to generate
the error voltage at COMP. The current-mode
regulator compares voltage at the COMP pin
to the inductor current to regulate the output
voltage. The use of current-mode regulation
improves transient response and control loop
stability.
voltage at startup due to input current
overshoot at startup. When power is applied to
the MP1527, or with power applied when
enable is asserted, a 2µA internal current
source charges the external capacitor at SS.
As the capacitor charges, the voltage at SS
rises. The MP1527 internally clamps the
voltage at COMP to 0.7V above the voltage at
SS. This limits the inductor current at start-up,
forcing the input current to rise slowly to the
current required to regulate the output voltage
during soft-start.
At the beginning of each cycle, the n-channel
MOSFET switch is turned on, forcing the
inductor current to rise. The current at the
source of the switch is internally measured and
converted to a voltage by the current sense
amplifier. That voltage is compared to the
error voltage at COMP. When the inductor
current rises sufficiently, the PWM comparator
turns off the switch forcing the inductor current
to the output capacitor through the external
rectifier. This forces the inductor current to
decrease. The peak inductor current is
controlled by the voltage at COMP, which in
turn is controlled by the output voltage. Thus
the output voltage controls the inductor current
to satisfy the load.
The soft-start period is determined by the
equation:
t
SS = 2.75 *105 * CSS
Where CSS (in F) is the soft-start capacitor from
SS to SGND, and tSS (in seconds) is the soft-
start period.
Determine the capacitor required for a given
soft-start period by the equation:
CSS = 3.64 *10-6 * tSS
Use values for CSS between 10nF and 22nF to
set the soft-start period.
Fault Timer-Latch Function
Internal Low-Dropout Regulator
The MP1527 includes an output fault detector
and timer-latch circuitry to disable the regulator
in the event of an undervoltage, overcurrent, or
The internal power to the MP1527 is supplied
from the input voltage (IN) through an internal
2.4V low-dropout linear regulator, whose
output is BP. Bypass BP to SGND with a 10nF
or greater capacitor to insure the MP1527
operates properly. The internal regulator can
not supply any more current than is required to
operate the MP1527, therefore do not apply
any external load to BP.
thermal overload.
Once the soft-start is
complete, the fault comparator monitors the
voltage at FB. If the voltage falls below the
1.098V fault threshold, the capacitor at SS
charges through an internal 2µA current
source. If the fault condition remains long
enough for the capacitor at SS to charge to
1.2V, the FAULT output is pulled low and the
power switch is turned off, disabling the output.
Soft-Start
The MP1527 includes a soft-start timer that
limits the voltage at COMP during start-up to
prevent excessive current at the input. This
prevents premature termination of the source
MP1527 Rev 1.8_8/31/05
Monolithic Power Systems, Inc.
8
MPS [ MONOLITHIC POWER SYSTEMS ]
