Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
Internal Resource Mapping
RFSTR1, RFSTR0 — Register Following Stretch
This two bit field determines the amount of clock stretch on accesses
to the 512 byte Register Following Map. It is valid regardless of the
state of the NDRF bit. In Single Chip and Peripheral Modes this bit
has no meaning or effect.
Table 5-3. RFSTR Stretch Bit Definition
Number of E Clocks
RFSTR1
RFSTR0
Stretched
0
0
1
1
0
1
0
1
0
1
2
3
EXSTR1, EXSTR0 — External Access Stretch
This two bit field determines the amount of clock stretch on accesses
to the External Address Space. In Single Chip and Peripheral Modes
this bit has no meaning or effect.
Table 5-4. EXSTR Stretch Bit Definition
Number of E Clocks
EXSTR1
EXSTR0
Stretched
0
0
1
1
0
1
0
1
0
1
2
3
ROMON28, ROMON32 — Enable bits for ROM
These bits are used to enable the Flash EEPROM arrays FEE28 and
FEE32 (68HC912D60) or ROM arrays ROM28 and ROM32
(68HC12D60) respectively.
0 = Corresponding Flash EEPROM/ROM array disabled from the
memory map.
1 = Corresponding Flash EEPROM/ROM array enabled in the
memory map.
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
Operating Modes and Resource Mapping
85
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