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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
Operating Modes and Resource Mapping  
Internal Resource Mapping  
5.5.1 Register Block Mapping  
After reset the 512 byte register block resides at location $0000 but can  
be reassigned to any 2K byte boundary within the standard 64K byte  
address space. Mapping of internal registers is controlled by five bits in  
the INITRG register. The register block occupies the first 512 bytes of the  
2K byte block.  
Bit 7  
REG15  
0
6
REG14  
0
5
REG13  
0
4
REG12  
0
3
REG11  
0
2
0
0
1
0
0
Bit 0  
MMSWAI  
0
RESET:  
INITRG — Initialization of Internal Register Position Register  
$0011  
REG[15:11] — Internal register map position  
These bits specify the upper five bits of the 16-bit registers address.  
Normal modes: write once; special modes: write anytime. Read  
anytime.  
MMSWAI — Memory Mapping Interface Stop in Wait Control  
This bit controls access to the memory mapping interface when in  
Wait mode.  
Normal modes: write anytime; special modes: write never. Read  
anytime.  
0 = Memory mapping interface continues to function during Wait  
mode.  
1 = Memory mapping interface access is shut down during Wait  
mode.  
68HC(9)12D60 — Rev 4.0  
MOTOROLA  
Advance Information  
Operating Modes and Resource Mapping  
81  
For More Information On This Product,  
Go to: www.freescale.com  
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