Freescale Semiconductor, Inc.
Development Support
• The SHIFT register contains data being received or transmitted
via the serial interface.
• The ADDRESS register is temporary storage for BDM commands.
• The CCRSAV register preserves the content of the CPU12 CCR
while BDM is active.
The only registers of interest to users are the STATUS register and the
CCRSAV register. The other BDM registers are only used by the BDM
firmware to execute commands. The registers are accessed by means
of the hardware READ_BD and WRITE_BD commands, but should not
be written during BDM operation (except the CCRSAV register which
could be written to modify the CCR value).
19.4.8 STATUS
The STATUS register is read and written by the BDM hardware as a
result of serial data shifted in on the BKGD pin.
Read: all modes.
Write: Bits 3 through 5, and bit 7 are writable in all modes. Bit 6,
BDMACT, can only be written if bit 7 H/F in the INSTRUCTION register
is a zero. Bit 2, CLKSW, can only be written if bit 7 H/F in the
INSTRUCTION register is a one. A user would never write ones to bits
3 through 5 because these bits are only used by BDM firmware.
BIT 7
6
5
4
3
2
1
-
BIT 0
-
ENBDM
BDMACT
ENTAG
SDV
TRACE
CLKSW
Special Sin-
gle Chip
& Periph
0
RESET:
1
0
0
0
0
0
0
0
0
0
0
0
0
0
(NOTE 1)
RESET:
0
All other
modes
(1)
STATUS— BDM Status Register
1. ENBDM is set to 1 by the firmware in Special Single Chip mode.
$FF01
Advance Information
348
68HC(9)12D60 — Rev 4.0
MOTOROLA
Development Support
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