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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
Analog-to-Digital Converter  
RST — Module Reset Bit  
When set, this bit causes all registers and activity in the module to  
assume the same state as out of power-on reset (except for ADPU bit  
in ATDCTL2, which remains set, allowing the ATD module to remain  
enabled).  
TSTOUT — Multiplex Output of TST[3:0] (Factory Use)  
TST[3:0] — Test Bits 3 to 0 (Reserved)  
Selects one of 16 reserved factory testing modes  
Bit 7  
PADx7  
0
6
PADx6  
0
5
PADx5  
0
4
PADx4  
0
3
PADx3  
0
2
PADx2  
0
1
PADx1  
0
Bit 0  
PADx0  
0
RESET:  
PORTAD0/PORTAD1 — Port AD Data Input Register  
$006F/$01EF  
PADx[7:0] — Port AD Data Input Bits  
After reset these bits reflect the state of the input pins.  
May be used for general-purpose digital input. When the software  
reads PORTADx, it obtains the digital levels that appear on the  
corresponding port AD pins. Pins with signals not meeting V or V  
IL  
IH  
specifications will have an indeterminate value. Writes to this register  
have no meaning at any time.  
Advance Information  
334  
68HC(9)12D60 — Rev 4.0  
Analog-to-Digital Converter  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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