Freescale Semiconductor, Inc.
MSCAN Controller
Programmer’s Model of Control Registers
17.13.14 msCAN12 Identifier Mask Registers (CIDMR0–7)
The identifier mask register specifies which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering. To
receive standard identifiers in 32 bit filter mode it is required to program
the last three bits (AM2–AM0) in the mask registers CIDMR1 and
CIDMR5 to ‘don’t care’. To receive standard identifiers in 16 bit filter
mode it is required to program the last three bits (AM2–AM0) in the mask
registers CIDMR1, CIDMR3, CIDMR5 and CIDMR7 to ‘don’t care’.
Bit 7
AM7
6
5
4
3
2
1
Bit 0
AM0
CIDMR0
$0114
R
AM6
AM5
AM4
AM3
AM2
AM1
W
R
CIDMR1
$0115
AM7
AM7
AM6
AM6
AM5
AM5
AM4
AM4
AM3
AM3
AM2
AM2
AM1
AM1
AM0
AM0
W
R
CIDMR2
$0116
W
R
CIDMR3
$0117
AM7
–
AM6
–
AM5
–
AM4
–
AM3
–
AM2
–
AM1
–
AM0
–
W
RESET
Bit 7
AM7
6
5
4
3
2
1
Bit 0
AM0
CIDMR4
$011C
R
AM6
AM5
AM4
AM3
AM2
AM1
W
R
CIDMR5
$011D
AM7
AM7
AM6
AM6
AM5
AM5
AM4
AM4
AM3
AM3
AM2
AM2
AM1
AM1
AM0
AM0
W
R
CIDMR6
$011E
W
R
CIDMR7
$011F
AM7
–
AM6
–
AM5
–
AM4
–
AM3
–
AM2
–
AM1
–
AM0
–
W
RESET
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
319
MSCAN Controller
For More Information On This Product,
Go to: www.freescale.com