Freescale Semiconductor, Inc.
MSCAN Controller
Bit 7
6
5
4
3
2
1
Bit 0
AC0
CIDAR0
$0110
R
AC7
AC7
AC7
AC6
AC5
AC4
AC3
AC2
AC1
W
R
CIDAR1
$0111
AC6
AC6
AC5
AC5
AC4
AC4
AC3
AC3
AC2
AC2
AC1
AC1
AC0
AC0
W
R
CIDAR2
$0112
W
R
CIDAR3
$0113
AC7
–
AC6
–
AC5
–
AC4
–
AC3
–
AC2
–
AC1
–
AC0
–
W
RESET
Bit 7
AC7
6
5
4
3
2
1
Bit 0
AC0
CIDAR4
$0118
R
AC6
AC5
AC4
AC3
AC2
AC1
W
R
CIDAR5
$0119
AC7
AC7
AC6
AC6
AC5
AC5
AC4
AC4
AC3
AC3
AC2
AC2
AC1
AC1
AC0
AC0
W
R
CIDAR6
$011A
W
R
CIDAR7
$011B
AC7
–
AC6
–
AC5
–
AC4
–
AC3
–
AC2
–
AC1
–
AC0
–
W
RESET
AC7 – AC0 — Acceptance Code Bits
AC7 – AC0 comprise a user defined sequence of bits with which the
corresponding bits of the related identifier register (IDRn) of the
receive message buffer are compared. The result of this comparison
is then masked with the corresponding identifier mask register.
NOTE: The CIDAR0–7 registers can only be written if the SFTRES bit in
CMCR0 is set.
Advance Information
318
68HC(9)12D60 — Rev 4.0
MOTOROLA
MSCAN Controller
For More Information On This Product,
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MOTOROLA [ MOTOROLA ]
