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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
MSCAN Controller  
Programmer’s Model of Control Registers  
17.12.4 Data Segment Registers (DSRn)  
The eight data segment registers contain the data to be transmitted or  
being received. The number of bytes to be transmitted or being received  
is determined by the data length code in the corresponding DLR.  
17.12.5 Transmit Buffer Priority Registers (TBPR)  
BIT 7  
PRIO7  
BIT 6  
PRIO6  
BIT 5  
PRIO5  
BIT 4  
PRIO4  
BIT 3  
PRIO3  
BIT 2  
PRIO2  
BIT 1  
PRIO1  
BIT 0  
PRIO0  
TBPR(1)  
$01xD  
R
W
RESET  
1. x is 5, 6, or 7 depending on which buffer Tx0, Tx1, or Tx2 respectively.  
PRIO7 – PRIO0 — Local Priority  
This field defines the local priority of the associated message buffer.  
The local priority is used for the internal prioritisation process of the  
msCAN12 and is defined to be highest for the smallest binary number.  
The msCAN12 implements the following internal prioritisation  
mechanism:  
• All transmission buffers with a cleared TXE flag participate in the  
prioritisation immediately before the SOF (Start of Frame) is sent.  
• The transmission buffer with the lowest local priority field wins the  
prioritisation.  
• In cases of more than one buffer having the same lowest priority,  
the message buffer with the lower index number wins.  
17.13 Programmer’s Model of Control Registers  
17.13.1 Overview  
The programmer’s model has been laid out for maximum simplicity and  
efficiency.  
68HC(9)12D60 — Rev 4.0  
MOTOROLA  
Advance Information  
MSCAN Controller  
303  
For More Information On This Product,  
Go to: www.freescale.com  
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