UC3844, 45 UC2844, 45
Figure 15. Representative Block Diagram
V
V
in
CC
V
CC
7(12)
36V
V
+
–
ref
Reference
Regulator
8(14)
V
+
CC
R
R
Internal
Bias
UVLO
–
2.5V
+
V
C
–
+
R
T
7(11)
V
ref
UVLO
3.6V
–
Q1
Output
6(10)
Oscillator
4(7)
2(3)
T
Q
Q
+
C
T
1.0mA
Power Ground
5(8)
S
+
–
–
+
R
Voltage Feedback
Input
PWM
Latch
2R
Error
R
Current Sense Input
3(5)
1.0V
Output
Compensation
Amplifier
Current Sense
Comparator
1(1)
R
S
Gnd
5(9)
+
–
Sink Only
Positive True Logic
=
Pin numbers in parenthesis are for the D suffix SO–14 package.
Figure 16. Timing Diagram
Capacitor C
T
Latch
‘‘Set’’ Input
Output/
Compensation
Current Sense
Input
Latch
‘‘Reset’’ Input
Output
Large R /Small C
Small R /Large C
T T
T
T
8
MOTOROLA ANALOG IC DEVICE DATA
MOTOROLA [ MOTOROLA ]
