UC3844, 45 UC2844, 45
Figure 24. MOSFET Parasitic Oscillations
Figure 25. Bipolar Transistor Drive
V
I
CC
B
V
in
V
in
7(12)
+
0
+
–
5.0V
ref
Base Charge
Removal
+
–
–
+
C
1
–
+
7(11)
6(10)
5(8)
R
–
Q1
g
Q1
T
6(1)
S
Q
–
R
5(8)
3(5)
+
Comp/Latch
3(5)
R
R
S
S
The totem–pole output can furnish negative base current for enhanced
Series gate resistor R will damp any high frequency parasitic oscillations
g
causedbytheMOSFETinputcapacitanceandanyserieswiringinductance
in the gate–source circuit.
transistor turn–off, with the addition of capacitor C .
1
Figure 26. Isolated MOSFET Drive
Figure 27. Latched Shutdown
V
V
CC
in
7(12)
8(14)
R
R
+
–
Isolation
Boundary
Bias
5.0V
ref
+
–
+
V
Waveforms
GS
–
Q1
+
Osc
7(11)
6(10)
5(8)
+
0
–
+
0
+
–
4(7)
1.0mA
2R
–
T
+
–
50% DC
V
25% DC
S
EA
– 1.4
N
N
2(3)
1(1)
(pin 1)
P
S
Q
–
I
=
R
R
pk
+
3 R
S
R
Comp/Latch
3(5)
C
N
S
R
S
N
p
2N
3905
MCR
101
5(9)
2N
3903
The MCR101 SCR must be selected for a holding of less than 0.5 mA at
. The simple two transistor circuit can be used in place of the SCR as
T
A(min)
shown. All resistors are 10 k.
Figure 28. Error Amplifier Compensation
From V
O
From V
O
2.5V
+
2.5V
+
R
i
1.0mA
2R
2(3)
1.0mA
2R
+
R
p
2(3)
R
–
+
–
i
EA
R
C
d
I
R
EA
f
R
C
R
I
R
d
f
R
C
p
1(1)
1(1)
5(9)
R
≥
8.8 k
5(9)
f
ErrorAmpcompensationcircuitforstabilizinganycurrent–modetopologyexcept
for boost and flyback converters operating with continuous inductor current.
Error Amp compensation circuit for stabilizing current–mode boost and flyback
topologies operating with continuous inductor current.
11
MOTOROLA ANALOG IC DEVICE DATA
MOTOROLA [ MOTOROLA ]
