CD–CA — Channel Select D through A
Table 10 A/D Converter Channel Assignments
Channel Select Control Bits
Channel
Signal
AN0
Result in ADRx if
MULT = 1
ADR1
CD
0
CC
0
CB
0
CA
0
0
0
0
1
AN1
ADR2
0
0
1
0
AN2
ADR3
0
0
1
1
AN3
ADR4
0
1
0
0
AN4*
ADR1
0
1
0
1
AN5*
ADR2
0
1
1
0
AN6*
ADR3
0
1
1
1
AN7*
ADR4
1
0
X
0
X
0
Reserved
ADR1–ADR4
ADR1
1
1
V
**
**
RH
1
1
1
1
1
1
0
1
1
1
0
1
V
ADR2
ADR3
ADR4
RL
(V )/2**
RH
Reserved**
* Not available in 48-pin package
**Used for factory testing
ADR1–ADR4 — A/D Results
$1031–$1034
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
6
6
6
6
6
5
5
5
5
5
4
4
4
4
4
3
3
3
3
3
2
2
2
2
2
1
Bit 0
$1031
$1032
$1033
$1034
1
1
1
1
Bit 0
Bit 0
Bit 0
Bit 0
ADR1
ADR2
ADR3
ADR4
Table 11 Analog Input to 8-Bit Result Translation Table
Bit 7
50%
6
5
4
3
2
1
Bit 0
(1)
25%
12.5%
6.25%
3.12%
1.56%
0.78%
0.39%
%
(2)
2.500
1.250
0.625
0.3125
0.1562
0.0781
0.0391
0.0195
Volts
(1)
(2)
% of V –V
V
= 0.0 V; V = 5.0 V
RL RH
RH
RL
OPTION — System Configuration Options
$1039
Bit 7
ADPU
0
6
CSEL
0
5
IRQE*
0
4
DLY*
1
3
CME
0
2
0
0
1
CR1*
0
Bit 0
CR0*
0
RESET:
*Can be written only once in first 64 cycles out of reset in normal modes, or any time in special modes.
ADPU — A/D Power Up
0 = A/D Converter powered down
1 = A/D Converter powered up
CSEL — Clock Select
0 = A/D and EEPROM use system E clock
1 = A/D and EEPROM use internal RC clock
MC68HC11A8
MC68HC11A8TS/D
MOTOROLA
43
MOTOROLA [ MOTOROLA ]
