7.0 MC68SEC000 AC ELECTRICAL SPECIFICATIONS — READ AND
WRITE CYCLES
Add the following table and Figures 9 and 10 to Section 10.16.
Applies to 3.3V and 5V.
(GND = 0 V; T = T to T ; see Figures 3 and 4)
A
L
H
10MHz
16MHz
20MHz
NUM
CHARACTERISTIC
UNIT
MIN
MAX
35
MIN
MAX
30
MIN
MAX
25
6
6A
7
Clock Low to Address Valid
Clock High to FC Valid
—
0
—
0
—
0
ns
ns
ns
35
30
25
Clock High to Address, Data Bus High Impedance (Maximum)
(Write)
—
55
—
50
—
42
8
Clock High to Address, FC Invalid (Minimum)
Clock High to AS, LDS, UDS Asserted
0
3
—
0
3
—
0
3
—
ns
ns
1
35
30
25
9
2
Address Valid to AS, LDS, UDS Asserted (Read)/ AS Asserted
(Write)
20
—
15
—
10
—
ns
11
2
FC Valid to AS, LDS, UDS Asserted (Read)/ AS Asserted (Write)
Clock Low to AS, LDS, UDS Negated
45
3
—
35
—
—
—
—
45
3
—
30
—
—
—
—
40
3
—
25
—
—
—
—
ns
ns
ns
ns
ns
ns
11A
1
12
2
AS, LDS, UDS Negated to Address, FC Invalid
AS (and LDS, UDS Read) Width Asserted
LDS, UDS Width Asserted (Write)
15
15
120
60
60
10
100
50
50
13
2
195
95
14
2
14A
2
AS, LDS, UDS Width Negated
105
15
16
Clock High to Control Bus High Impedance
AS, LDS, UDS Negated to R/W Invalid
—
55
—
—
50
—
—
42
—
ns
ns
2
15
15
10
17
1
Clock High to R/W High (Read)
Clock High to R/W Low (Write)
AS Asserted to R/W Low (Write)
Address Valid to R/W Low (Write)
FC Valid to R/W Low (Write)
0
0
35
35
10
—
—
—
0
0
30
30
10
—
—
—
0
0
25
25
10
—
—
—
ns
ns
ns
ns
ns
ns
18
1
20
2,6
—
0
—
0
—
0
20A
21
2
2
50
50
30
30
25
25
21A
2
R/W Low to DS Asserted (Write)
22
23
Clock Low to Data-Out Valid (Write)
—
35
—
—
30
—
—
25
—
ns
ns
2
AS, LDS, UDS Negated to Data-Out Invalid (Write)
30
15
10
25
26
27
28
2
5
2
Data-Out Valid to LDS, UDS Asserted (Write)
30
5
—
—
15
5
—
—
10
5
—
—
95
95
ns
ns
ns
ns
Data-In Valid to Clock Low (Setup Time on Read)
AS, LDS, UDS Negated to DTACK Negated (Asynchronous Hold)
0
110
110
0
110
110
0
28A Clock High to DTACK Negated
0
0
0
12
M68000 USER’S MANUAL ADDENDUM
MOTOROLA