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MC68331CFC16 参数 Datasheet PDF下载

MC68331CFC16图片预览
型号: MC68331CFC16
PDF下载: 下载PDF文件 查看货源
内容描述: 用户手册 [User’s Manual]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 254 页 / 1319 K
品牌: MOTOROLA [ MOTOROLA ]
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Table 4-8 System Frequencies from 32.768-kHz Reference (Continued)  
To obtain clock frequency in kilohertz, find counter modulus in the left column, then look in appropriate prescaler cell.  
Shaded cells contain values that exceed specified maximum system frequency.  
Modulus  
Y
Prescaler  
[W:X] = 00  
6029  
6160  
6291  
6423  
6554  
6685  
6816  
6947  
7078  
7209  
7340  
7471  
7602  
7733  
7864  
7995  
8126  
8258  
8389  
[W:X] = 01  
12059  
12321  
12583  
12845  
13107  
13369  
13631  
13894  
14156  
14418  
14680  
14942  
15204  
15466  
15729  
15991  
16253  
16515  
16777  
[W:X] = 10  
24117  
24642  
25166  
25690  
26214  
26739  
27263  
27787  
28312  
28836  
29360  
2988  
[W:X] = 11  
48234  
49283  
50332  
51380  
52428  
53477  
54526  
55575  
56623  
57672  
58720  
59769  
60817  
61866  
62915  
63963  
65011  
66060  
67109  
101101  
101110  
101111  
110000  
110001  
110010  
110011  
110100  
110101  
110110  
110111  
111000  
111001  
111010  
111011  
111100  
111101  
111110  
111111  
30409  
30933  
31457  
31982  
32506  
33030  
33554  
4
4.3.3 External Bus Clock  
The state of the external clock division bit (EDIV) in SYNCR determines clock rate for  
the external bus clock signal (ECLK) available on pin ADDR23. ECLK is a bus clock  
for MC6800 devices and peripherals. ECLK frequency can be set to system clock fre-  
quency divided by eight or system clock frequency divided by sixteen. The clock is en-  
abled by the CS10 field in chip select pin assignment register 1 (CSPAR1). ECLK  
operation during low-power stop is described in the following paragraph. Refer to 4.8  
Chip Selects for more information about the external bus clock.  
4.3.4 Low-Power Operation  
Low-power operation is initiated by the CPU32. To reduce power consumption selec-  
tively, the CPU can set the STOP bits in each module configuration register. To mini-  
mize overall microcontroller power consumption, the CPU can execute the LPSTOP  
instruction, which causes the SIM to turn off the system clock.  
When individual module STOP bits are set, clock signals inside each module are  
turned off, but module registers are still accessible.  
When the CPU executes LPSTOP, a special CPU space bus cycle writes a copy of  
the current interrupt mask into the clock control logic. The SIM brings the MCU out of  
low-power operation when either an interrupt of higher priority than the stored mask or  
a reset occurs. Refer to 4.5.4.2 LPSTOP Broadcast Cycle and SECTION 5 CEN-  
TRAL PROCESSING UNIT for more information.  
MC68331  
SYSTEM INTEGRATION MODULE  
MOTOROLA  
4-15  
USER’S MANUAL