4.3.1 Clock Sources
The state of the clock mode (MODCLK) pin during reset determines clock source.
When MODCLK is held high during reset, the clock synthesizer generates a clock sig-
nal from either an internal or an external reference frequency — the clock synthesizer
control register (SYNCR) determines operating frequency and mode of operation.
When MODCLK is held low during reset, the clock synthesizer is disabled and an ex-
ternal system clock signal must be applied — SYNCR control bits have no effect.
To generate a reference frequency using the internal oscillator a reference crystal
must be connected between the EXTAL and XTAL pins. Figure 4-5 shows a recom-
mended circuit.
C1
22 pF*
R1
330k
XTAL
R2
10M
EXTAL
C2
22 pF*
4
V
SSI
Resistance and capacitance based on a test circuit constructed with a DAISHINKU DMX-38 32.768-kHz crystal.
Specific components must be based on crystal type. Contact crystal vendor for exact circuit.
*
32 OSCILLATOR
Figure 4-5 System Clock Oscillator Circuit
If an external reference signal or an external system clock signal is applied via the EX-
TAL pin, the XTAL pin must be left floating. External reference signal frequency must
be less than or equal to maximum specified reference frequency. External system
clock signal frequency must be less than or equal to maximum specified system clock
frequency.
When an external system clock signal is applied (PLL disabled, MODCLK = 0 during
reset), the duty cycle of the input is critical, especially at operating frequencies close
to maximum. The relationship between clock signal duty cycle and clock signal period
is expressed:
Minumum External Clock Period
Minimum External Clock High ⁄ Low Time
= ----------------------------------------------------------------------------------------------------------------------------------------------------------------------
50% – Percentage Variation of External Clock Input Duty Cycle
4.3.2 Clock Synthesizer Operation
V
is used to power the clock circuits when either an internal or an external ref-
DDSYN
erence frequency is applied. A separate power source increases MCU noise immunity
and can be used to run the clock when the MCU is powered down. A quiet power sup-
ply must be used as the V
source. Adequate external bypass capacitors should
DDSYN
be placed as close as possible to the V
pin to assure stable operating frequen-
DDSYN
MOTOROLA
4-10
SYSTEM INTEGRATION MODULE
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
