Table A-7 Background Debugging Mode Timing
(V = 5.0 Vdc ± 10%, V = 0 Vdc, T = T to T )
DD
SS
A
L
H
Num
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
Characteristic
Symbol
Min
Max
—
Unit
ns
DSI Input Setup Time
t
15
10
15
10
—
2
DSISU
DSI Input Hold Time
t
—
ns
DSIH
DSCLK Setup Time
t
—
ns
DSCSU
DSCLK Hold Time
t
—
ns
DSCH
DSOD
DSO Delay Time
t
25
—
ns
DSCLK Cycle Time
t
t
cyc
DSCCYC
CLKOUT High to FREEZE Asserted/Negated
CLKOUT High to IFETCH High Impedance
CLKOUT High to IFETCH Valid
DSCLK Low Time
t
—
—
—
1
50
50
50
—
ns
ns
ns
FRZAN
t
IFZ
t
IF
DSCLO
t
t
cyc
cyc
B10 FREEZE Asserted to IFETCH Valid
Notes:
1. All AC timing is shown with respect to 20% V and 70% V levels unless otherwise noted.
t
TBD
—
t
FRZIF
DD
DD
A
MOTOROLA
A-20
ELECTRICAL CHARACTERISTICS
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
