OUTPUT PINS
PD
dual–modulus prescaler divide values respectively for high
and low modulus control levels, N the number programmed
into the ÷ N counter, and A the number programmed into the
÷ A counter. Note that when a prescaler is needed, the dual–
modulus version offers a distinct advantage. The dual–
modulus prescaler allows a higher reference frequency at
the phase detector input, increasing system performance ca-
pability, and simplifying the loop filter design.
out
Phase Detector A Output (Pin 5)
This single–ended (three–state) phase detector output
produces a loop–error signal that is used with a loop filter to
control a VCO.
Frequency f > f or f Leading: Negative Pulses
V
R
R
R
V
V
Frequency f < f or f Lagging: Positive Pulses
V
f , f
R
V
Frequency f = f and Phase Coincidence: High–Imped-
V
R Counter Output, N Counter Output (Pins 13, 3)
ance State
Buffered, divided reference and f frequency outputs. The
in
and f outputs are connected internally to the ÷ R and
f
R
V
φ , φ
R
V
÷ N counter outputs respectively, allowing the counters to be
used independently, as well as monitoring the phase detector
inputs.
Phase Detector B Outputs (Pins 16, 15)
Double–ended phase detector outputs. These outputs can
be combined externally for a loop–error signal. A single–
ended output is also available for this purpose (see PD
).
out
If frequency f is greater than f or if the phase of f is
LD
V
R
V
Lock Detector Output (Pin 7)
leading, then error information is provided by φ pulsing low.
V
This output is essentially at a high level when the loop is
locked (f , f of same phase and frequency), and pulses low
when loop is out of lock.
φ
remains essentially high.
R
R V
If the frequency f is less than f or if the phase of f is
V
R
V
lagging, then error information is provided by φ pulsing low.
R
φ
V
remains essentially high.
REF
out
If the frequency of f = f and both are in phase, then both
and φ remain high except for a small minimum time
R
V
R
Buffered Reference Oscillator Output (Pin 14)
φ
V
period when both pulse low in phase.
This output can be used as a second local oscillator, refer-
ence oscillator to another frequency synthesizer, or as the
system clock to a microprocessor controller.
MC
Dual–Modulus Prescale Control Output (Pin 12)
POWER SUPPLY
This output generates a signal by the on–chip control logic
circuitry for controlling an external dual–modulus prescaler.
The MC level is low at the beginning of a count cycle and
remains low until the ÷ A counter has counted down from its
programmed value. At this time, MC goes high and remains
high until the ÷ N counter has counted the rest of the way
down from its programmed value (N – A additional counts
since both ÷ N and ÷ A are counting down during the first por-
tion of the cycle). MC is then set back low, the counters pre-
set to their respective programmed values, and the above
sequence repeated. This provides for a total programmable
V
DD
Positive Power Supply (Pin 4)
The positive power supply potential. This pin may range
from + 3 to + 9 V with respect to V
.
SS
V
SS
Negative Power Supply (Pin 6)
The most negative supply potential. This pin is usually
ground.
divide value (N ) = N P + A where P and P + 1 represent the
T
MC145151–2 through MC145158–2
22
MOTOROLA
MOTOROLA [ MOTOROLA ]
