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MSU2051C25 参数 Datasheet PDF下载

MSU2051C25图片预览
型号: MSU2051C25
PDF下载: 下载PDF文件 查看货源
内容描述: 低工作电压为16 MHz ROM MCU少 [low working voltage 16 MHz ROM less MCU]
分类和应用:
文件页数/大小: 21 页 / 121 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
 浏览型号MSU2051C25的Datasheet PDF文件第1页浏览型号MSU2051C25的Datasheet PDF文件第2页浏览型号MSU2051C25的Datasheet PDF文件第3页浏览型号MSU2051C25的Datasheet PDF文件第5页浏览型号MSU2051C25的Datasheet PDF文件第6页浏览型号MSU2051C25的Datasheet PDF文件第7页浏览型号MSU2051C25的Datasheet PDF文件第8页浏览型号MSU2051C25的Datasheet PDF文件第9页  
MO SEL VITELIC  
MSU2051/U2031  
Pin Descriptions  
40 PDIP Dice 44 LQFP 44 PQFP 44 PLCC Symbol  
Active I/O  
Names  
Pin# Pad#  
Pin#  
40  
41  
42  
43  
44  
1
Pin#  
40  
41  
42  
43  
44  
1
Pin#  
2
1
1
2
P1.0  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i
bit 0 of Port 1  
2
3
P1.1  
bit 1 of Port 1  
3
3
4
P1.2  
bit 2 of Port 1  
4
4
5
P1.3  
bit 3 of Port 1  
5
5
6
P1.4  
bit 4 of Port 1  
6
6
7
P1.5  
bit 5 of Port 1  
7
7
2
2
8
P1.6  
bit 6 of Port 1  
8
8
3
3
9
P1.7  
bit 7 of Port 1  
9
9
4
4
10  
11  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
RES  
Reset  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20-22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42,43  
5
5
RXD/P3.0  
TXD/P3.1  
#INT0/P3.2  
#INT1/P3.3  
T0/P3.4  
T1/P3.5  
#WR/P3.6  
#RD/P3.7  
XTAL2  
i/o  
i/o  
bit 0 of Port 3 & Receive data  
bit 1 of Port 3 & Transmit data  
7
7
L/-  
L/-  
8
8
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
o
bit 2 of Port 3 & low true Interrupt 0  
bit 3 of Port 3 & low true Interrupt 1  
bit 4 of Port 3 & Timer 0  
9
9
10  
11  
12  
13  
14  
15  
16  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
10  
11  
12  
13  
14  
15  
16  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
bit 5 of Port 3 & Timer 1  
L/-  
L/-  
bit 6 of Port 3 & Write (low enable)  
bit 7 of Port 3 & Read (low enable)  
Crystal out  
XTAL1  
i
Crystal in  
VSS  
Sink Voltage, Ground  
A8/P2.0  
A9/P2.1  
A10/P2.2  
A11/P2.3  
A12/P2.4  
A13/P2.5  
A14/P2.6  
A15/P2.7  
#PSEN  
ALE  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
o
bit 0 of Port 2 & Address 8  
bit 1 of Port 2 & Address 9  
bit 2 of Port 2 & Address 10  
bit 3 of Port 2 & Address 11  
bit 4 of Port 2 & Address 12  
bit 5 of Port 2 & Address 13  
bit 6 of Port 2 & Address 14  
bit 7 of Port 2 & Address 15  
Program store enable (low enable)  
Address latch enable  
L
H
L
o
#EA  
i
External access first 4K memory  
bit 7 of Port 0 & Address or Data 7  
bit 6 of Port 0 & Address or Data 6  
bit 5 of Port 0 & Address or Data 5  
bit 4 of Port 0 & Address or Data 4  
bit 3 of Port 0 & Address or Data 3  
bit 2 of Port 0 & Address or Data 2  
bit 1 of Port 0 & Address or Data 1  
bit 0 of Port 0 & Address or Data 0  
Drive Voltage, +3 Vcc (or +5 Vcc)  
AD7/P0.7  
AD6/P0.6  
AD5/P0.5  
AD4/P0.4  
AD3/P0.3  
AD2/P0.2  
AD1/P0.1  
AD0/P0.0  
VDD  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
i/o  
Rev. 1.0 February 1998  
4
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