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M38270EFMXXXFS 参数 Datasheet PDF下载

M38270EFMXXXFS图片预览
型号: M38270EFMXXXFS
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS微机 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 70 页 / 1104 K
品牌: MITSUBISHI [ Mitsubishi Group ]
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MITSUBISHI MICROCOMPUTERS  
3827 Group  
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER  
I/O PORTS  
Direction Registers  
b7  
b0  
PULL register A  
(PULLA : address 001616)  
The I/O ports have direction registers which determine the input/  
output direction of each individual pin. (P00–P07 and P10–P15 use  
bit 0 of port P0, P1 direction registers respectively.)  
When “1” is written to that bit, that pin becomes an output pin.  
When “0” is written to the bit corresponding to a pin, that pin be-  
comes an input pin.  
P00, P01 pull-up  
P02,P03 pull-up  
P04–P07 pull-up  
P10–P13 pull-up  
P14,P15 pull-up  
P16,P17 pull-up  
P20–P23 pull-up  
P24–P27 pull-up  
If data is read from a pin set to output, the value of the port output  
latch is read, not the value of the pin itself. Pins set to input are  
floating and the value of that pin can be read. If a pin set to input  
is written to, only the port output latch is written to and the pin re-  
mains floating.  
b7  
b0  
PULL register B  
(PULLB : address 001716)  
P41–P43 pull-up  
P44–P47 pull-up  
P50–P53 pull-up  
P54–P57 pull-up  
P60–P63 pull-up  
Port P3 Output Control Register  
Bit 0 of the port P3 output control register (address 000716) en-  
ables control of the output of ports P30 to P37.  
When the bit is set to “1”, the port output function is valid.  
When resetting, bit 0 of the port P3 output control register is set to  
“0” (the port output function is invalid.) and ports P30 to P37 are  
pulled up.  
P64–P67 pull-up  
Not used (return “0” when read)  
0 : No pull-up  
1 : Pull-up  
Note : The contents of PULL register A and PULL register B  
do not affect ports programmed as the output port.  
Pull-up Control  
By setting the PULL register A (address 001616) or the PULL reg-  
ister B (address 001716), ports P0 to P6 can control pull-up with a  
program.  
Fig. 9 Structure of PULL register A and PULL register B  
However, the contents of PULL register A and PULL register B do  
not affect ports programmed as the output ports.  
The PULL register A setting is invalid for pins set to segment out-  
put on the segment output enable register.  
11  
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