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M34280M1 参数 Datasheet PDF下载

M34280M1图片预览
型号: M34280M1
PDF下载: 下载PDF文件 查看货源
内容描述: 单片4位微机的CMOS红外遥控变送器 [SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS]
分类和应用: 遥控远程控制计算机
文件页数/大小: 47 页 / 505 K
品牌: MITSUBISHI [ Mitsubishi Group ]
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MITSUBISHI MICROCOMPUTERS  
4280 Group  
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS  
(5) Most significant ROM code reference enable flag (URS)  
URS flag controls whether to refer to the contents of the most  
significant 1 bit (bit 8) of ROM code when executing the TABP  
p instruction. If URS flag is “0,” the contents of the most  
significant 1 bit of ROM code is not referred even when  
executing the TABP p instruction. However, if URS flag is “1,”  
the contents of the most significant 1 bit of ROM code is set to  
flag CY when executing the TABP p instruction (Figure 4).  
URS flag is “0” after system is released from reset and returned  
from RAM back-up mode. It can be set to “1” with the URSC  
instruction, but cannot be cleared to “0.”  
Program counter (PC)  
Executing BM  
instruction  
Executing RT  
instruction  
SK0  
SK1  
SK2  
SK3  
(SP) = 0  
(SP) = 1  
(SP) = 2  
(SP) = 3  
(6) Stack registers (SKs) and stack pointer (SP)  
Stack registers (SKs) are used to temporarily store the contents  
of program counter (PC) just before branching until returning  
to the original routine when;  
Stack pointer (SP) points “3” at reset or  
returning from RAM back-up mode. It points “0”  
by executing the first BM instruction, and the  
contents of program counter is stored in SK0.  
When the BM instruction is executed after four  
stack registers are used ((SP) = 3), (SP) = 0  
and the contents of SK0 is destroyed.  
• performing a subroutine call, or  
• executing the table reference instruction (TABP p).  
Stack registers (SKs) are four identical registers, so that  
subroutines can be nested up to 4 levels. However, one of  
stack registers is used when executing a table reference  
instruction. Accordingly, be careful not to over the stack. The  
contents of registers SKs are destroyed when 4 levels are  
exceeded.  
Fig. 5 Stack registers (SKs) structure  
The register SK nesting level is pointed automatically by 2-bit  
stack pointer (SP).  
Figure 5 shows the stack registers (SKs) structure.  
Figure 6 shows the example of operation at subroutine call.  
(SP)  
(SK0)  
(PC)  
0
000116  
SUB1  
(7) Skip flag  
Main program  
Address  
Subroutine  
SUB1 :  
Skip flag controls skip decision for the conditional skip  
instructions and continuous described skip instructions.  
Note : The 4280 Group just invalidates the next instruction  
when a skip is performed. The contents of program  
counter is not increased by 2. Accordingly, the number  
of cycles does not change even if skip is not performed.  
However, the cycle count becomes “1” if the TABP p,  
RT, or RTS instruction is skipped.  
000016 NOP  
NOP  
·
·
·
000116 BM SUB1  
000216 NOP  
RT  
(PC)  
(SP)  
(SK0)  
3
Note: Returning to the BM instruction execution  
address with the RT instruction, and the BM  
instruction is equivalent to the NOP instruction.  
Fig. 6 Example of operation at subroutine call  
MITSUBISHI  
ELECTRIC  
7