MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
CONNECTIONS OF UNUSED PINS
Pin
Connection
Open or connect to VDD pin (Note 1).
Set the output latch to “1” and open, or
connect to VDD pin (Note 2).
D0–D7
E0, E1
Open or connect to VSS pin.
E2
G0–G3
Set the output latch to “0” and open, or
connect to VSS pin.
Notes 1: Port D7: Set the bit 2 (PU02) of the pull-down control register PU0 to “0” by software and turn the pull-down transistor OFF.
2: Set the corresponding bits (PU00, PU01) of the pull-down control register PU0 to “0” by software and turn the pull-down
transistor OFF.
(Note in order to set the output latch to “0” to make pins open)
• After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to “0” by software.
Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.
• To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away
(caused by noise).
(Note when connecting to VSS and VDD)
• Connect the unused pins to VSS or VDD at the shortest distance and use the thick wire against noise.
PORT FUNCTION
Input/
Output
Output
(7)
Control
bits
Control
Control
Port
Pin
D0–D6
Output structure
Remark
instructions registers
Port D
1 bit SD
RD
P-channel open-drain
CLD
D7
I/O
(1)
SD
RD
PU0
PU0
Pull-down function and key-on
wakeup function
CLD
(programmable)
SZD
Port E
I/O
(2)
Output: OEA
2 bits IAE
Input:
E0
E1
P-channel open-drain
Pull-down function and key-on
wakeup function
(programmable)
Input
(1)
3 bits IAE
E2
Port G
I/O
4 bits OGA
IAG
G0–G3
P-channel open-drain
CMOS
Pull-down function and key-on
wakeup function
(4)
Port CARR
Output
(1)
1 bit OCRA
C
CARR
• Instruction clock (INSTCK)
DEFINITION OF CLOCK AND CYCLE
• System clock (STCK)
The system clock is the source clock for controlling this product.
It can be selected as shown below whether to use the CCK
instruction.
The instruction clock is a signal derived by dividing the system
clock by 4, and is the basic clock for controlling CPU. The one
instruction clock cycle is equivalent to one machine cycle.
• Machine cycle
The machine cycle is the cycle required to execute the
instruction.
CCK instruction
When not using
When using
System clock
f(XIN)/8
Instruction clock
f(XIN)/32
f(XIN)
f(XIN)/4
MITSUBISHI
ELECTRIC
4
MITSUBISHI [ Mitsubishi Group ]
