MITSUBISHI MICROCOMPUTERS
MITSUBISHI MICROCOMPUTERS
4280 Group
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MACHINE INSTRUCTIONS (CONTINUED)
Instruction code
Parameter
Skip condition
Detailed description
Mnemonic
Function
Hexadecimal
notation
Type of
instructions
D8 D7 D6 D5 D4 D3 D2 D1 D0
CLD
RD
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
0
1
0
(D) ← 0
–
–
0 1 1
0 1 4
Clears (0) to port D (high-impedance state).
–
–
1
1
1
1
(D(Y)) ← 0
Clears (0) to a bit of port D specified by register Y (high-impedance state).
(Y) = 0 to 7
SD
0
0
0
0
1
0
1
0
1
(D(Y)) ← 1
–
0 1 5
Sets (1) to a bit of port D specified by register Y.
–
–
1
2
1
2
(Y) = 0 to 7
SZD
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
1
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
1
1
0
1
1
0
0
0
1
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
(D(Y)) = 0 ?
(Y) = 7
(D(Y)) = 0
(Y) = 7
0 2 4
0 2 B
0 8 4
0 5 6
0 8 0
0 2 8
Skips the next instruction when a bit of port D specified by register Y is “0.”
OEA
IAE
(E1, E0) ← (A1, A0)
(A2–A0) ← (E2–E0)
(G) ← (A)
–
–
–
–
–
–
Outputs the contents of register A to port E.
Transfers the contents of port E to register A.
Outputs the contents of register A to port G.
Transfers the contents of port G to register A.
No operation
–
–
–
–
–
–
1
1
1
1
1
1
1
1
1
1
1
1
OGA
IAG
(A) ← (G)
NOP
POF
(PC) ← (PC) + 1
RAM back-up
0 0
0 0
0
D
Puts the system in RAM back-up state.
SNZP
CCK
0
0
0
0
0
1
0
0
0
1
0
1
0
0
1
0
1
1
(P) = 1 ?
(P) = 1
0 0
0 5
3
9
Skips the next instruction when P flag is “1.”
After skipping, P flag remains unchanged.
–
–
1
1
1
1
STCK changes to f(XIN)
–
System clock (STCK) changes to f(XIN) from f(XIN)/8. Execute this CCK instruction at address 0 in page
0.
TLOA
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
1
0
0
0
1
0
1
1
0
0
1
1
0
1
1
1
0
0
1
1
(LO1, LO0) ← (A1, A0)
(URS) ← 1
–
–
–
–
0 5
0 8
0 8
0 0
8
2
F
F
Transfers the contents of register A to the logic operation selection register LO.
Sets the most significant ROM code reference enable flag (URS) to “1.”
Transfers the contents of register A to register PU0.
–
–
–
–
1
1
1
1
1
1
1
1
URSC
TPU0A
WRST
(PU02–PU00) ← (A2–A0)
(WDF1) ← 0
Initializes the watchdog timer flag (WDF1).
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ELECTRIC
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ELECTRIC
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