MITSUBISHI MICROCOMPUTERS
MITSUBISHI MICROCOMPUTERS
4280 Group
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MACHINE INSTRUCTIONS (CONTINUED)
Instruction code
Parameter
Skip condition
Detailed description
Mnemonic
LA n
Function
Hexadecimal
notation
Type of
instructions
D8 D7 D6 D5 D4 D3 D2 D1 D0
0
1
0
1
1
n3 n2 n1 n0
0 B
n
1
1
1
3
(A) ← n
Continuous
description
–
–
Loads the value n in the immediate field to register A.
n = 0 to 15
When the LA instructions are continuously coded and executed, only the first LA instruction is executed
and other LA instructions coded continuously are skipped.
0
1
0
0
1
0
p2 p1 p0
TABP p
0 9
p
(SK(SP)) ← (PC)
(SP) ← (SP) + 1
(PCH) ← p, p=0 to 7
–
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A when URS flag is cleared to “0.” These bits
7 to 0 are the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0) specified by registers A and D in
page p.
(PCL) ← (DR2–DR0, A3–A0)
When URS=0,
0/1 When this instruction is executed, 1 stage of stack register is used.
Transfers bit 8 of ROM pattern is transferred to flag CY when URS flag is set to “1” (after the URSC
instruction is executed).
(B) ← (ROM(PC))7 to 4
(A) ← (ROM(PC))3 to 0
When URS=1,
One of stack is used when the TABP p instruction is executed.
(CY) ← (ROM(PC))8
(B) ← (ROM(PC))7 to 4
(A) ← (ROM(PC))3 to 0
(SP) ← (SP) – 1
(PC) ← (SK(SP))
AM
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
1
0
0
1
1
0
1
0 0
0 0
0 A
A
B
n
1
1
1
1
1
1
(A) ← (A) + (M(DP))
–
–
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY
remains unchanged.
AMC
A n
(A) ← (A) + (M(DP))+ (CY)
(CY) ← Carry
–
0/1 Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag
CY.
n3 n2 n1 n0
(A) ← (A) + n
Overflow = 0
–
Adds the value n in the immediate field to register A.
n = 0 to 15
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
SC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
1
1
0
0
0
1
1
1
0
1
1
1
1
1
0
1
1
1
0
0
0
1
0
1
0
1
1
0 0
0 0
0 2
0 1
0 1
0 4
7
6
1
1
1
1
1
1
1
1
1
1
1
1
(CY) ← 1
–
1
0
–
–
Sets (1) to carry flag CY.
RC
(CY) ← 0
–
Clears (0) to carry flag CY.
SZC
CMA
RAR
LGOP
F
C
D
1
(CY) = 0 ?
(CY) = 0
Skips the next instruction when the contents of carry flag CY is “0.”
Stores the one‘s complement for register A‘s contents in register A.
(A) ← (A)
–
–
–
→ CY → A3A2A1A0
0/1 Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Logic operation instruction XOR, OR, AND
–
Execute the logic operation selected by logic operation selection register LO between the contents of
register A and register E, and stores the result in register A.
MITSUBISHI
ELECTRIC
MITSUBISHI
ELECTRIC
28
29
MITSUBISHI [ Mitsubishi Group ]
