333 WINDOW
C5 C6
C9 C10
C1 C2
IP7:0
ODD
FIELD
1024
1024
LINE N21
LINE N
C4
C8
C0
N11
N21
FIELD
DELAY
434
OR
Output is shifted
by 1 line in
every field
VIDEO
LINE N12
L7:0
LINE N11
834
1024
1024
N
ARRAY
535 WINDOW
IP7:0
ODD
512
512
LINE N22 C48
LINE N21 C8
LINE N C40
C49 C50 C51 C52
C9 C10 C11 C12
C41 C42 C43 C44
FIELD
N11
N21
FIELD
DELAY
512
512
LINE N11
C0
C1
C2
C3
C4
L7:0
Output is shifted
by 1 line in
every field
VIDEO
LINE N12
838
ARRAY
DELAY
512
BYPASSED
LINE N12 C32
C33 C34 C35 C36
REG B BIT 7 SET
N12
512
512
N
N22
512
838 WINDOW
IP7:0
LINE N23 C24 C25 C26 C27 C28 C29 C30 C31
LINE N22 C56 C57 C58 C59 C60 C61 C62 C63
LINE N21 C16 C17 C18 C19 C20 C21 C22 C23
LINE N C48 C49 C50 C51 C52 C53 C54 C55
ODD
512
512
FIELD
N13
N11
FIELD
DELAY
512
512
N21
N23
L7:0
Output is shifted
by 2 lines in
every field
VIDEO
LINE N14
838
ARRAY
DELAY
512
BYPASSED
LINE N11
LINE N12 C40 C41 C42 C43 C44 C45 C46 C47
LINE N13 C0 C1 C2 C3 C4 C5 C6 C7
LINE N14 C32 C33 C34 C35 C36 C37 C38 C39
C8
C9 C10 C11 C12 C13 C14 C15
REG B BIT 7 SET
N14
N12
512
512
N
512
N22
Fig. 5 Line delay allocations in SINGLE device interlaced systems
8
MITEL [ MITEL NETWORKS CORPORATION ]
