MT9173/74
C-Channel
(Bit 0-7)
XXX01111
Internal Control
Register
00000000
Internal Diagnostic
Register
01000000
Preliminary Information
Description
Default Mode-1
: Bit rate is 80 kbit/s. ATTACK,
PSEN, DINB, DRR and all diagnostics are disabled.
TxHK=0.
XXX11111
00010000
Default Mode-2
Bit rate is 160 kbit/s. ATTACK,
PSEN, DINB, DRR and all diagnostics are disabled.
TxHK=0.
Table 4a. Default Mode Selection
01000000
Notes:
Default Mode 1 can also be selected by tying CDSTi/CDi pin low when DNIC is operating in dual mode.
Default Mode 2 can also be selected by tying CDSTi/CDi pin high when DNIC is operating in dual mode.
bit 0
Reg Sel-1
bit 1
Reg Sel-2
bit 2
Loopback
bit 3
bit 4
FUN
bit 5
PSWAP
bit 6
DLO
bit 7
Not Used
Default Mode Selection
(Refer to Table 4a)
Bit
0
1
2,3
Name
Reg Sel-1
Reg Sel-2
Loopback
Description
Register Select-1. Must be set to ’0’ to select the Diagnostic Register.
Register Select-2. Must be set to ’1’ to select the Diagnostic Register.
Bit 2
0
0
1
1
Bit 3
0
1
0
1
All loopback testing functions disabled. Normal operation.
DSTi internally looped back into DSTo for system diagnostics.
L
OUT
is internally looped back into L
IN
for system diagnostics.
DSTo is internally looped back into DSTi for end-to-end testing.
4
5
FUN
PSWAP
Force Unsync. When set to ’1’, the DNIC is forced out-of-sync to test the SYNC
recovery circuitry. When set to ’0’, the operation continues in synchronization.
Polynomial Swap. When set to ’1’, the scrambling and descrambling polynomials
are interchanged (use for MAS mode only). When set to ’0’, the polynomials retain
their normal designations.
Disable Line Out. When set to ’1’, the signal on L
OUT
is set set to V
Bias
. When set to
’0’, L
OUT
pin functions normally.
Must be set to ’0’ for normal operation.
Table 5. Diagnostic Register
6
7
DLO
Not Used
Notes:
When bits 4-7 of the Diagnostic Register are all set to one, the DNIC operates in one of the default modes as defined in Table 4a,
depending upon the status of bit-3.
Do not use L
OUT
to L
IN
loopback in DN/SLV mode.
Do not use DSTo to DSTi loopback in MOD/MAS mode.
The Diagnostics Register Reset bit (bit 2) of the
Control Register determines the reset state of the
Diagnostics Register. If, on writing to the Control
Register, this bit is set to logic “0”, the Diagnostics
Register will be reset coincident with the frame
pulse. When this bit is logic “1”, the Diagnostics
Register will not be reset.
In order to use the
diagnostic features, the Diagnostics Register must
be continuously written to. The output C-channel
sends status information from the Status Register to
the system along with the received HK bit as shown
in Table 6.
In MOD mode, the CD port is no longer an ST-BUS
but is a serial bit stream operating at the bit rate
selected. It continues to transfer the C-channel but
the D-channel and the HK bit no longer exist. DUAL
port operation must be used in MOD mode. The C-
channel is clocked in and out of the CD port by TCK
and CLD with TCK defining the bits and CLD the
9-148
MITEL [ MITEL NETWORKS CORPORATION ]
