MT90810
Pin Description
Pin #
32, 34
Name
A[0:1]
Preliminary Information
Description
Microprocessor Address
(TTL Input).
In non-multiplexed mode: address to FMIC internal registers
In multiplexed mode: unused (leave unconnected).
29
ALE
Microprocessor Address Latch Enable
(TTL Input). Selects the
microprocessor mode.
In Intel multiplexed mode, the falling edge of this signal is used to
sample the address.
27
CS
Microprocessor Bus Chip Select
(TTL Input). This active low input
enables microprocessor access to connection and data memory and
internal registers.
Read/Data Strobe
(TTL Input).
In Intel mode (RD), this active low input configures the data bus lines
as output.
In Motorola mode (DS), this active low input operates with CS to
enable read and write operation.
26
RD/ [DS]
25
WR/ [R/W]
Write\ Read/Write Strobe
(TTL Input).
In Intel mode (WR), this active low input configures the data bus lines
as inputs.
In Motorola mode (R/W), this input controls the direction of the data
bus D[0:7] during a microprocessor access.
30
RDY [DTACK]
Ready/Data Acknowledge
(Open Drain Output).
In Intel mode (RDY), this output acts as IOCHRDY. A 10K pull up is
required.
In Motorola mode (DTACK), this active low output indicates a
successful data bus transfer. A 10K pull up is required.
31
49, 50
ERR
DREQ[0:1]
Error Status
(Output). This pin is asserted high if either a clock error
(loss of C4b clock), DMA overrun condition or PLL unlock occurs.
DMA Request
(Output). When DMA operations on the device are
enabled, this pin requests transfers for DMA reads/writes from/to the
device.
DMA Acknowledge
(TTL Input). When DMA operations on the device
are enabled, this pin receives acknowledgement for DMA reads/writes
from/to the device.
JTAG Input Clock
(TTL Input). Maximum recommended clock rate is
16 MHz. If not used, this pin should be left unconnected.
JTAG Serial Input Data
(TTL Input). If not used, this pin should be left
unconnected.
47, 48
DACK[0:1]
10
11
TCK
TDI
2-148
MITEL [ MITEL NETWORKS CORPORATION ]
