MT9080
CMOS
D15o
D14o
D13o
D12o
D10o
D11o
VDD
VSS
VSS
VSS
VSS
D9o
76
10
8
6
4
2
84
82
80
D8i
D9i
D10i
D11i
VSS
D12i
D13i
D14i
D15i
VSS
CK
VDD
VSS
IC
IC
FP
CS
DS
R/W
DTA
NC
78
D8o
D7i
D6i
D5i
D4i
D3i
D2i
D1i
D0i
12
14
16
18
20
22
24
26
28
30
74
72
70
68
66
VSS
D7o
D6o
D5o
D4o
VSS
D3o
D2o
D1o
D0o
VSS
VDD
CD
A15
A14
A13
A12
A11
A10
A9
A8
84 PIN PLCC
64
62
60
58
56
46
48
34
36
38
40
42
44
50
32
52
A5
54
NC
NC
VDD
NC
IC
IC
A0
A1
A2
A3
A4
A6
ODE
VSS
Figure 2 - Pin Connections
Pin Description
Pin #
1
2-5
Name
V
SS
D0i-D3i
Ground.
Input/Microport Data Bus.
This is part of a 16 bit data bus. The data bus is bidirectional in
Connect Memory mode where it is typically interfaced to a microprocessor. In all other
modes the data bus is an input. Data to be switched through the device is clocked in at this
port.
Ground.
Input/Microport Data Bus.
See description for pins 2-5 above.
Ground.
Description
6
7-10
11
12-15
16
17-20
21
22
23
24
25,26
27
V
SS
D4i-D7i
V
SS
D8i-D11i Input/Microport Data Bus.
See description for pins 2-5 above.
V
SS
Ground.
See description for pins 2-5 above.
D12i-D15i Input/Microport Data Bus.
V
SS
CK
V
DD
V
SS
IC
FP
Ground.
Clock.
Master clock input which is used to clock data into and out of the device. It also
clocks the internal 11 bit counter.
+5V supply input .
Ground.
Internal Connection.
Should be tied to V
SS
for normal operation.
Frame Pulse.
An active low signal that serves as a synchronous clear for the internal 11 bit
counter in all modes except Shift Register mode. The counter is cleared on a rising edge of
CK. In the Shift Register mode, FP serves to align channel boundaries.
2-102
VSS
ME
Mx
My
Mz
A7
MITEL [ MITEL NETWORKS CORPORATION ]
