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MT9075BP 参数 Datasheet PDF下载

MT9075BP图片预览
型号: MT9075BP
PDF下载: 下载PDF文件 查看货源
内容描述: E1单芯片收发器 [E1 Single Chip Transceiver]
分类和应用: PC
文件页数/大小: 82 页 / 275 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT9075B  
Preliminary Information  
Bit  
Name  
Functional Description  
Unused.  
Bit  
Name  
Functional Description  
7
6
---  
7
ODE  
(0)  
Output Data Enable. If one, the  
DSTo and CSTo output drivers  
function normally. When low, DSTo  
and CSTo will be tristated.  
PRBSO PRBS  
Interrupt.  
(PRBSO  
Counter  
Overflow  
unmasked  
When  
(0)  
=
1), an interrupt is  
Note: When ODE =1, DSTo and  
CSTo can be individually tristated  
by DSToDE and CSToDE (page  
01H, address 16H) respectively.  
initiated on overflow of PRBS  
counter (page 04H, address 10H)  
from FFH to 0H. Interrupt vector =  
00000010.  
6
SPND Suspend Interrupts. If one, the  
5
4
PRBSI PRBS Interrupt. When unmasked  
IRQ output (pin 12 in PLCC, 85 in  
MQFP) will be in a high-impedance  
state and all interrupts will be  
ignored. If zero, the IRQ output will  
function normally.  
(0)  
(PRBSI = 1), an interrupt is initiated  
on a single PRBS detection error.  
Interrupt vector = 00000010.  
(0)  
S nibI Changed  
S
Nibble Interrupt.  
a
a
When unmasked (S nibI = 1), an  
(0)  
a
5
4
INTA  
(0)  
Interrupt Acknowledge. A zero-to-  
one or one-to-zero transition will  
clear any pending interrupt and  
make IRQ high.  
interrupt  
detection of a change of state in any  
of received S nibbles (nibble S ,  
is  
generated  
upon  
a
a5  
nibble S , nibble S or nibble S ).  
a6  
a7  
a8  
Interrupt vector = 00000010.  
TxCCS Transmit  
Common  
Channel  
Signalling. If one, the transmit  
section of the device is in common  
channel signalling (CCS) mode. If  
zero, it is in Channel Associated  
Signalling (CAS) mode.  
(0)  
3
2
1
0
S bitI Changed S Bit Interrupt. When  
a
a
unmasked (S bitI = 1), an interrupt  
is generated upon detection of a  
change of state in any of received  
(0)  
a
S
bits (S , S , S  
or S ).  
a
a5  
a6  
a7 a8  
Interrupt vector = 00000010.  
3
RPSIG Register  
Programmed  
Signalling. If one, the transmit CAS  
signalling will be controlled by  
programming page 05H. If zero, the  
transmit CAS signalling will be  
controlled through the CSTi stream.  
(0)  
C8S I Eight Consecutive S  
Nibble  
a6  
a6  
Interrupt. When unmasked (C8S I  
= 1), an interrupt is generated upon  
detection of the eighth consecutive  
(0)  
a6  
S
nibble with the same pattern.  
a6  
Interrupt vector = 00000010.  
Table 21 - Interrupt, Signalling and BERT  
Control Word (Page 01H, Address 1AH)  
(continued)  
S I  
Changed S Nibble Interrupt.  
a6  
a6  
When unmasked (S I = 1), an  
(0)  
a6  
interrupt  
detection of a change of state in  
received nibbles. Interrupt  
vector = 00000010.  
is  
generated  
upon  
S
a6  
S I  
Changed S Bit Interrupt. When  
a5  
a5  
unmasked (S I =1), an interrupt is  
generated upon detection of a  
(0)  
a5  
change of state in the received S  
bit. Interrupt vector = 00000010.  
a5  
Table 20 - National Use Bit Interrupt Mask Word  
(Page 01H, Address 19H)  
34  
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