Preliminary Information
MT9075B
used to control the transmit channel associated
signalling. The DSTi and DSTo streams contain the
transmit and receive voice and digital data.
National Bit Buffers
Table 7 shows the contents of the transmit and
receive Frame Alignment Signals (FAS) and Non-
frame Alignment Signals (NFAS) of time slot zero of
a PCM 30 signal. Even numbered frames (CRC
Frame # 0, 2, 4,...) are FASs and odd numbered
frames (CRC Frame # 1, 3, 5,...) are NFASs. The bits
of each channel are numbered 1 to 8, with bit 1 being
the most significant and bit 8 the least significant.
Identification Code
The MT9075B shall be identified by the code
10101010, read from the identification code status
register (page 03H, address 1FH).
Reset Operation (Initialization)
PCM 30 Channel Zero
CRC
Frame/
Type
CRC
1
C1
0
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
0
4
5
6
7
8
The MT9075B can be reset using the hardware
RESET pin (pin 11 in PLCC, pin 84 in MQFP, see pin
description for external reset circuit requirements) or
the software reset bit RST (page 01H, address 11H).
When the device emerges from its reset state it will
begin to function with the default settings described
in Table 6. A reset operation takes 1 full frame (125
us) to complete.
0/FAS
1
1
0
1
1
1/NFAS
2/FAS
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
C2
0
1
1
0
1
1
3/NFAS
4/FAS
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
C3
1
1
1
0
1
1
5/NFAS
6/FAS
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
Function
Status
C4
0
1
1
0
1
1
Mode
Loopbacks
Termination
Deactivated
7/NFAS
8/FAS
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
Transmit FAS
Transmit non-FAS
Transmit MFAS (CAS)
Data Link
C 0011011
n
C1
1
1
1
0
1
1
1/S 1111111
n
9/NFAS
10/FAS
11/NFAS
12/FAS
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
00001111
Deactivated
Activated
C2
1
1
1
0
1
1
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
CRC Interworking
Signalling
CAS Registers
Deactivated
C3
1
1
0
1
1
ABCD Bit Debounce
Interrupts
13/NFAS E1
14/FAS C4
15/NFAS E2
A
0
Sa4 Sa5 Sa6 Sa7 Sa8
Interrupt Mask Word
Zero unmasked, all
others masked;
1
1
0
1
1
A
Sa4 Sa5 Sa6 Sa7 Sa8
interrupts not suspended
Table 7 - FAS and NFAS Structure
RxMF Output
Error Insertion
HDLCs
Signalling Multiframe
Deactivated
indicates position of CRC-4 multiframe alignment signa
Deactivated
Counters
Cleared
Table 8 illustrates the organization of the MT9075B
transmit and receive national bit buffers. Each row is
an addressable byte of the MT9075B national bit
buffer, and each column contains the national bits of
an odd numbered frame of each CRC-4 Multiframe.
The transmit and receive national bit buffers are
located at page 0DH and 0EH respectively.
Tx Message Buffer
All locations set to 54H
All locations cleared
Per Time Slot Control
Buffer
Table 6 - Reset Status
Transmit AIS Operation
The pin TAIS (Transmit AIS, pin 60 in PLCC, pin 48 in
MQFP) allows an all ones signal to be transmitted
from the point of power-up without the need to write
any control registers. During this time the IRQ pin is
tristated. After the interface has been initialized
normal operation can take place by making TAIS
high.
15
MITEL [ MITEL NETWORKS CORPORATION ]
