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MT9075AP 参数 Datasheet PDF下载

MT9075AP图片预览
型号: MT9075AP
PDF下载: 下载PDF文件 查看货源
内容描述: E1单芯片收发器 [E1 Single Chip Transceiver]
分类和应用:
文件页数/大小: 78 页 / 939 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT9075A  
Preliminary Information  
Bit  
Name  
Functional Description  
Bit  
Name  
Functional Description  
CNTCLR  
2
Counter Clear. If one, all status  
counters are cleared and held low.  
Zero for normal operation.  
7
ODE  
Output Data Enable. If one, the  
DSTo and CSTo output drivers  
function normally. When low, DSTo  
and CSTo will be tristated.  
1
MSN  
Most  
Nibble. If one, the CSTo and CSTi  
channel associated signalling  
Significant  
Signalling  
Note: When ODE =1, DSTo and  
CSTo can be individually tristated  
by DSToDE and CSToDE (page  
01H, address 16H) respectively.  
nibbles will be valid in the most  
significant portion of each ST-BUS  
time slot. If zero, the CSTo and  
CSTi channel associated signalling  
nibbles will be valid in the least  
significant portion of each ST-BUS  
time slot.  
6
SPND Suspend Interrupts. If one, the  
IRQ output (pin 12 in PLCC, 85 in  
MQFP) will be in a high-impedance  
state and all interrupts will be  
ignored. If zero, the IRQ output will  
function normally.  
64KCCS  
0
64 Kbits/s Common Channel  
Signalling. If one, common channel  
signalling information is sourced  
from CSTi, and common channel  
signalling information is clocked out  
of CSTo. The transmit clock is an  
internal clock. This 64 KHz clock is  
divided down from C4b and is  
synchronous with the STBUS  
channel boundaries. The rising  
edges of the clock occur between  
channels 1 and 2; 5 and 6; 9 and  
10; 13 and 14; 17 and 18; 21 and  
22; 25 and 26; 29 and 30. The  
receive clock is synchronous with  
the same channel times, but derived  
from the extracted clock timebase.  
The CCS receive clock is driven out  
on Rx64KCK (pin 47 in PLCC, 35 in  
MQFP) when this bit is set.  
5
4
INTA  
Interrupt Acknowledge. A zero-to-  
one or one-to-zero transition will  
clear any pending interrupt and  
make IRQ high.  
TxCCS Transmit  
Common  
Channel  
Signalling. If one, the transmit  
section of the device is in common  
channel signalling (CCS) mode. If  
zero, it is in Channel Associated  
Signalling (CAS) mode.  
3
RPSIG Register  
Programmed  
Signalling. If one, the transmit CAS  
signalling will be controlled by  
programming page 05H. If zero, the  
transmit CAS signalling will be  
controlled through the CSTi stream.  
Table 21 - Interrupt, Signalling and BERT  
Control Word (Page 01H, Address 1AH)  
(continued)  
Table 21 - Interrupt, Signalling and BERT  
Control Word (Page 01H, Address 1AH)  
4-162  
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