MT9074
Advance Information
Bit
Name
Functional Description
Bit Name
Functional Description
7
T1/E1 E1 mode selection. when this bit is
7
RSV Reserved. Must be kept high for
one, the device is in E1 mode.
normal operation.
6-5
4
RSV
Reserved. Must be kept at 0 for
normal operation.
6-4 RSV Reserved. Must be kept low for normal
operation.
LIUEn LIU Enable.Setting this bit low
enables the internal LIU front-end.
Setting this pin high disables the
LIU. Digital inputs RXA and RXB are
sampled by the rising edge of E2.0i
(C1.50) to strobe in the received line
data. Digital transmit data is clocked
out of pins TXA and TXB with the
rising edge of C2.0o
3
CPL Custom Pulse Level. Setting this bit
low enables the internal ROM values in
generating the transmit pulses. The
ROM is coded for different line
terminations or build out, as specified
in the LIU Control word. Setting this bit
high disables the pre-programmed
pulse templates. Each of the 4 phases
that generate a mark derive their D/A
coefficients
programmed in the CPW registers.
from
the
values
3
ELOS ELOS Enable. Set this bit low to set
the analog loss of signal threshold to
40 dB below nominal. Set this bit
high to set the analog loss of signal
threshold to 20 dB below nominal.
2-0 RSV Reserved. Must be kept at 0 for normal
operation.
Table 97 - Custom Tx Pulse Enable
(Page 2, Address 11H) (E1)
2
1
RSV
Reserved. Must be kept at 0 for
normal operation.
ADSEQ Digital Milliwatt or Digital Test
Sequence. If one, the A-law digital
milliwatt analog test sequence will
be selected by the Per Time Slot
Control bits TTST and RTST.If zero,
a PRBS generator / detector will be
connected to channels with TTST,
RRST respectively
Bit Name
Functional Description
7
RSV Reserved. Must be kept at 0 for normal
operation.
6-0 CP6-0 Custom Pulse. These bits provide the
capability for programming the
magnitude setting for the TTIP/TRING
line driver A/D converter during the first
phase of a mark. The greater the
binary number loaded into the register,
the greater the amplitude driven out.
This feature is enabled when the
control bit 3 - CPL of the Custom Tx
Pulse Enable Register - address 11H
of Page 2 is set high.
0
RSV
Reserved. Must be kept at 0 for
normal operation.
Table 96 - Configuration Control Word
(Page 2, Address 10H) (E1)
Table 98 - Custom Pulse Word 1
(Page 2, Address 1CH) (E1)
80
MITEL [ MITEL NETWORKS CORPORATION ]
