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MT9074AL 参数 Datasheet PDF下载

MT9074AL图片预览
型号: MT9074AL
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1单芯片收发器 [T1/E1/J1 Single Chip Transceiver]
分类和应用: 电信集成电路
文件页数/大小: 122 页 / 371 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Advance Information  
MT9074  
Bit  
Name  
Functional Description  
Bit Name  
Functional Description  
2
PRBSOM  
PRBS Counter Overflow  
Interrupt. When unmasked  
(PRBSO = 1), an interrupt is  
initiated on overflow of PRBS  
counter (page 04H, address  
10H) from FFH to 0H. If 1 -  
unmasked, 0 - masked.  
0
SIGIM Signalling (CAS) Interrupt Mask.  
When unmasked and any of the  
receive ABCD bits of any channel  
changes state an interrupt is initiated.  
If 1 - unmasked, 0 - masked.  
Table 93 - Interrupt Mask Word Three (E1)  
(Page 1, Address 1EH)  
1
PRBSMFO PRBS MultiFrame Counter  
M
Overflow Interrupt When  
unmasked an interrupt will be  
generated  
whenever  
the  
multiframe counter attached  
to the PRBS error counter  
overflows. If 1 - unmasked, 0 -  
masked.  
0
- - -  
Unused.  
Table 92 - Interrupt Mask Word Two (E1)  
(Page 1, Address 1DH)  
Bit Name  
Functional Description  
Unused  
7-5  
4
- - -  
JAIM Jitter Attenuation Interrupt Mask.  
When unmasked, an interrupt will be  
initiated when the jitter attenuator  
FIFO comes within four bytes of an  
overflow or underflow condition. If 1 -  
unmasked, 0 - masked.  
3
2
1
1SECIM One Second Status Interrupt Mask.  
When unmasked (1SECI = 1), an  
interrupt is initiated when the 1SEC  
status bit changes from zero to one. If  
1 - unmasked, 0 - masked.  
5SECIM Five Second Status Interrupt Mask.  
When unmasked (5SECI = 1), an  
interrupt is initiated when the 5SECI  
status bit changes from zero to one. If  
1 - unmasked, 0 - masked.  
RCRIM RCRI  
Interrupt  
Mask.  
When  
unmasked (RCRI=1), an interrupt is  
initiated when RCR (remote alarm &  
CRC-4 error) status bit changes from  
zero to one. If 1 - unmasked, 0 -  
masked.  
Table 93 - Interrupt Mask Word Three (E1)  
(Page 1, Address 1EH)  
77  
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